netdev - Re: [PATCH net-next v1 5/5] net: phy: micrel: ksz886x/ksz8081: add cabletest support

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Message-ID: <20200713085042.6t3b6svujwxpc5ez@pengutronix.de>
Date:   Mon, 13 Jul 2020 10:50:42 +0200
From:   Oleksij Rempel <o.rempel@...gutronix.de>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>, kernel@...gutronix.de,
        linux-kernel@...r.kernel.org, netdev@...r.kernel.org,
        Philippe Schenker <philippe.schenker@...adex.com>
Subject: Re: [PATCH net-next v1 5/5] net: phy: micrel: ksz886x/ksz8081: add
 cabletest support

On Mon, Jul 13, 2020 at 06:11:30AM +0200, Oleksij Rempel wrote:
> On Sat, Jul 11, 2020 at 08:29:12PM +0200, Andrew Lunn wrote:
> > On Fri, Jul 10, 2020 at 02:08:51PM +0200, Oleksij Rempel wrote:
> > > This patch support for cable test for the ksz886x switches and the
> > > ksz8081 PHY.
> > > 
> > > The patch was tested on a KSZ8873RLL switch with following results:
> > > 
> > > - port 1:
> > >   - cannot detect any distance
> > >   - provides inverted values
> > >     (Errata: DS80000830A: "LinkMD does not work on Port 1",
> > >      http://ww1.microchip.com/downloads/en/DeviceDoc/KSZ8873-Errata-DS80000830A.pdf)
> > >     - Reports "short" on open or ok.
> > >     - Reports "ok" on short.
> > > 
> > > - port 2:
> > >   - can detect distance
> > >   - can detect open on each wire of pair A (wire 1 and 2)
> > >   - can detect open only on one wire of pair B (only wire 3)
> > >   - can detect short between wires of a pair (wires 1 + 2 or 3 + 6)
> > >   - short between pairs is detected as open.
> > >     For example short between wires 2 + 3 is detected as open.
> > > 
> > > In order to work around the errata for port 1, the ksz8795 switch driver
> > > should be extended to provide proper device tree support for the related
> > > PHY nodes. So we can set a DT property to mark the port 1 as affected by
> > > the errata.
> 
> Hi Andrew,
>  
> > Hi Oleksij
> > 
> > Do the PHY register read/writes pass through the DSA driver for the
> > 8873?  I was wondering if the switch could intercept reads/writes on
> > port1 for KSZ8081_LMD and return EOPNOTSUPP? That would be a more
> > robust solution than DT properties, which are going to get forgotten.
> 
> Yes, it was my first idea as well. But this switch allows direct MDIO
> access to the PHYs and this PHY driver could be used without DSA driver.
> Not sure if we should support both variants?
> 
> Beside, the Port 1 need at least one more quirk. The pause souport is
> announced but is not working. Should we some how clear Puase bit in the PHY and
> tell PHY framework to not use it? What is the best way to do it?

On other hand, if adding this quirks in to switch driver is acceptable
way, i'll be happy with this as well.

Regards,
Oleksij
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