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Message-ID: <33ae0b5ae31ae9a97f6fbbebcab23f777937d89d.1594632220.git.nicolas.ferre@microchip.com>
Date: Mon, 13 Jul 2020 12:05:26 +0200
From: <nicolas.ferre@...rochip.com>
To: <linux@...linux.org.uk>, <linux-arm-kernel@...ts.infradead.org>,
<netdev@...r.kernel.org>,
Claudiu Beznea <claudiu.beznea@...rochip.com>,
<harini.katakam@...inx.com>, <f.fainelli@...il.com>
CC: <linux-kernel@...r.kernel.org>,
"David S. Miller" <davem@...emloft.net>,
Alexandre Belloni <alexandre.belloni@...tlin.com>,
<antoine.tenart@...tlin.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>
Subject: [PATCH v6 2/2] net: macb: Add WoL interrupt support for MACB type of Ethernet controller
From: Nicolas Ferre <nicolas.ferre@...rochip.com>
Handle the Wake-on-Lan interrupt for the Cadence MACB Ethernet
controller.
As we do for the GEM version, we handle of WoL interrupt in a
specialized interrupt handler for MACB version that is positionned
just between suspend() and resume() calls.
Cc: Claudiu Beznea <claudiu.beznea@...rochip.com>
Cc: Harini Katakam <harini.katakam@...inx.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@...rochip.com>
---
Changes in v2:
- Addition of pm_wakeup_event() in WoL IRQ
drivers/net/ethernet/cadence/macb_main.c | 39 +++++++++++++++++++++++-
1 file changed, 38 insertions(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 122c54e40f91..fce5d545ebab 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -1517,6 +1517,35 @@ static void macb_tx_restart(struct macb_queue *queue)
macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
}
+static irqreturn_t macb_wol_interrupt(int irq, void *dev_id)
+{
+ struct macb_queue *queue = dev_id;
+ struct macb *bp = queue->bp;
+ u32 status;
+
+ status = queue_readl(queue, ISR);
+
+ if (unlikely(!status))
+ return IRQ_NONE;
+
+ spin_lock(&bp->lock);
+
+ if (status & MACB_BIT(WOL)) {
+ queue_writel(queue, IDR, MACB_BIT(WOL));
+ macb_writel(bp, WOL, 0);
+ netdev_vdbg(bp->dev, "MACB WoL: queue = %u, isr = 0x%08lx\n",
+ (unsigned int)(queue - bp->queues),
+ (unsigned long)status);
+ if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE)
+ queue_writel(queue, ISR, MACB_BIT(WOL));
+ pm_wakeup_event(&bp->pdev->dev, 0);
+ }
+
+ spin_unlock(&bp->lock);
+
+ return IRQ_HANDLED;
+}
+
static irqreturn_t gem_wol_interrupt(int irq, void *dev_id)
{
struct macb_queue *queue = dev_id;
@@ -4619,8 +4648,8 @@ static int __maybe_unused macb_suspend(struct device *dev)
/* Change interrupt handler and
* Enable WoL IRQ on queue 0
*/
+ devm_free_irq(dev, bp->queues[0].irq, bp->queues);
if (macb_is_gem(bp)) {
- devm_free_irq(dev, bp->queues[0].irq, bp->queues);
err = devm_request_irq(dev, bp->queues[0].irq, gem_wol_interrupt,
IRQF_SHARED, netdev->name, bp->queues);
if (err) {
@@ -4632,6 +4661,14 @@ static int __maybe_unused macb_suspend(struct device *dev)
queue_writel(bp->queues, IER, GEM_BIT(WOL));
gem_writel(bp, WOL, MACB_BIT(MAG));
} else {
+ err = devm_request_irq(dev, bp->queues[0].irq, macb_wol_interrupt,
+ IRQF_SHARED, netdev->name, bp->queues);
+ if (err) {
+ dev_err(dev,
+ "Unable to request IRQ %d (error %d)\n",
+ bp->queues[0].irq, err);
+ return err;
+ }
queue_writel(bp->queues, IER, MACB_BIT(WOL));
macb_writel(bp, WOL, MACB_BIT(MAG));
}
--
2.27.0
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