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Message-ID: <20200714030231.GA1205304@bogus>
Date: Mon, 13 Jul 2020 21:02:31 -0600
From: Rob Herring <robh@...nel.org>
To: Geert Uytterhoeven <geert+renesas@...der.be>
Cc: Rob Herring <robh+dt@...nel.org>,
linux-renesas-soc@...r.kernel.org, netdev@...r.kernel.org,
Heiner Kallweit <hkallweit1@...il.com>,
"David S . Miller" <davem@...emloft.net>,
Magnus Damm <magnus.damm@...il.com>,
Wolfram Sang <wsa+renesas@...g-engineering.com>,
devicetree@...r.kernel.org, Dan Murphy <dmurphy@...com>,
Sergei Shtylyov <sergei.shtylyov@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
Andrew Lunn <andrew@...n.ch>,
Oleksij Rempel <linux@...pel-privat.de>,
Jakub Kicinski <kuba@...nel.org>,
Philippe Schenker <philippe.schenker@...adex.com>,
Kazuya Mizuguchi <kazuya.mizuguchi.ks@...esas.com>
Subject: Re: [PATCH v2 2/7] dt-bindings: net: renesas,ravb: Document internal
clock delay properties
On Mon, 06 Jul 2020 16:35:24 +0200, Geert Uytterhoeven wrote:
> Some EtherAVB variants support internal clock delay configuration, which
> can add larger delays than the delays that are typically supported by
> the PHY (using an "rgmii-*id" PHY mode, and/or "[rt]xc-skew-ps"
> properties).
>
> Add properties for configuring the internal MAC delays.
> These properties are mandatory, even when specified as zero, to
> distinguish between old and new DTBs.
>
> Update the (bogus) example accordingly.
>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@...der.be>
> ---
> v2:
> - Replace "renesas,[rt]xc-delay-ps" by "[rt]x-internal-delay-ps",
> - Add "(bogus)" to the example update, to avoid people considering it
> a one-to-one conversion.
> ---
> .../devicetree/bindings/net/renesas,ravb.txt | 29 ++++++++++---------
> 1 file changed, 16 insertions(+), 13 deletions(-)
>
Reviewed-by: Rob Herring <robh@...nel.org>
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