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Message-ID: <20200716150918.6c287f7a@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com>
Date: Thu, 16 Jul 2020 15:09:18 -0700
From: Jakub Kicinski <kuba@...nel.org>
To: Matthew Hagan <mnhagan88@...il.com>
Cc: Andrew Lunn <andrew@...n.ch>,
Vivien Didelot <vivien.didelot@...il.com>,
Florian Fainelli <f.fainelli@...il.com>,
"David S. Miller" <davem@...emloft.net>, linux@...linux.org.uk,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
John Crispin <john@...ozen.org>,
Jonathan McDowell <noodles@...th.li>
Subject: Re: [PATCH 1/2] net: dsa: qca8k: Add additional PORT0_PAD_CTRL
options
On Mon, 13 Jul 2020 21:50:25 +0100 Matthew Hagan wrote:
> + u32 val = qca8k_read(priv, QCA8K_REG_PORT0_PAD_CTRL);
> + val |= QCA8K_PORT0_PAD_CTRL_MAC06_EXCHG;
> + val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE;
> + val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE;
> + qca8k_write(priv, QCA8K_REG_PORT0_PAD_CTRL, val);
> + val = qca8k_read(priv, reg);
> + val |= QCA8K_PORT_PAD_RGMII_EN;
> + qca8k_write(priv, reg, val);
> + val |= QCA8K_PORT_PAD_RGMII_EN |
> + QCA8K_PORT_PAD_RGMII_TX_DELAY(QCA8K_MAX_DELAY) |
> + QCA8K_PORT_PAD_RGMII_RX_DELAY(QCA8K_MAX_DELAY);
> + qca8k_write(priv, reg, val);
> + val |= QCA8K_PORT_PAD_SGMII_EN;
> + qca8k_write(priv, reg, val);
Since throughout the patch you're only setting bits perhaps
qca8k_reg_set() would be a better choice than manually reading
and then writing?
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