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Message-ID: <CAOMZO5DtYDomD8FDCZDwYCSr2AwNT81Ay4==aDxXyBxtyvPiJA@mail.gmail.com>
Date:   Fri, 17 Jul 2020 12:52:08 -0300
From:   Fabio Estevam <festevam@...il.com>
To:     netdev <netdev@...r.kernel.org>, Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Russell King - ARM Linux <linux@...linux.org.uk>,
        Heiner Kallweit <hkallweit1@...il.com>
Cc:     Bruno Thomsen <bth@...strup.com>,
        Lars Alex Pedersen <laa@...strup.com>
Subject: Re: fec: micrel: Ethernet PHY type ID auto-detection issue

Hi Bruno,

Adding netdev and the Ethernet PHY folks.


On Fri, Jul 17, 2020 at 12:48 PM Bruno Thomsen <bruno.thomsen@...il.com> wrote:
>
> Hi
>
> I have been having issues with Ethernet PHY type ID
> auto-detection when changing from the deprecated fec
> phy-reset-{gpios,duration,post-delay} properties to the
> modern mdio reset-{assert-us,deassert-us,gpios}
> properties in the device tree.
>
> Hardware:
> SoC: i.MX7D
> PHY: Mircrel KSZ8081RNB
> PHY address: 1
> RMII clock is generated by the Micrel PHY.
>
> Micrel pin wiring:
> CONFIG0: 4k75 PU
> CONFIG1: 1k PD
> PHYAD0: 4k75 PU
> PHYAD1: 1k PD
> PHYAD2/RXD1: 1k PD
> REXT: 6k49 PD
> INTRP: 1k PU
> XO+XI: 25MHz xtal
>
> Kernel trace from working (deprecated fec reset):
> kernel: Micrel KSZ8081 or KSZ8091 30be0000.ethernet-1:01: attached PHY driver
>  [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=30be0000.ethernet-1:01, irq=POLL)
>
> This way has been working with the mainline kernel 5.2.x-5.7.8.
>
> Kernel error messages (modem mdio reset):
> mdio_bus 30be0000.ethernet-1: MDIO device at address 1 is missing.
> fec 30be0000.ethernet eth0: Unable to connect to phy
>
> When debugging it I end up with the get_phy_device() call not
> working inside of_mdiobus_register_phy().
>
> A known workaround with modern mdio properties is
> to add "ethernet-phy-id0022.1560" as compatible,
> but it would be nice to know the root cause of this issue,
> so I can enable auto PHY id detection again.
>
> I have inserted snippets of the device tree below.
>
> DT common pin mux:
> &iomuxc {
>        pinctrl_enet1: enet1grp {
>                fsl,pins = <
>                        MX7D_PAD_GPIO1_IO10__ENET1_MDIO
> 0x03 /* X2-48 */
>                        MX7D_PAD_GPIO1_IO11__ENET1_MDC
> 0x03 /* X2-46 */
>                        MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0
> 0x71 /* X2-53 */
>                        MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1
> 0x71 /* X2-55 */
>                        MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL
> 0x71 /* X2-61 */
>                        MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0
> 0x79 /* X2-56 */
>                        MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1
> 0x79 /* X2-58 */
>                        MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL
> 0x79 /* X2-64 */
>                        MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER
> 0x73 /* X2-52 */
>                        /* PHY reset: SION, 100kPU, SRE_FAST, DSE_X1 */
>                        MX7D_PAD_ENET1_COL__GPIO7_IO15
> 0x40000070 /* X1-96 */
>                        /* Clock from PHY to MAC */
>                        MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1
> 0x40000073 /* X3-4 */
>                >;
>        };
> };
>
> DT working:
> &fec1 {
>        pinctrl-names = "default";
>        pinctrl-0 = <&pinctrl_enet1>;
>        phy-mode = "rmii";
>        phy-reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
>        phy-reset-duration = <100>;
>        phy-reset-post-delay = <1000>;
>        phy-handle = <&ethphy>;
>        status = "okay";
>
>        mdio {
>                #address-cells = <1>;
>                #size-cells = <0>;
>                ethphy: ethernet-phy@1 {
>                        compatible = "ethernet-phy-ieee802.3-c22";
>                        reg = <1>;
>                };
>        };
> };
>
> DT unable to detect PHY type ID:
> &fec1 {
>        pinctrl-names = "default";
>        pinctrl-0 = <&pinctrl_enet1>;
>        phy-mode = "rmii";
>        phy-handle = <&ethphy>;
>        status = "okay";
>
>        mdio {
>                #address-cells = <1>;
>                #size-cells = <0>;
>
>                ethphy: ethernet-phy@1 {
>                        compatible = "ethernet-phy-ieee802.3-c22";
>                        reg = <1>;
>                        max-speed = <100>;
>                        reset-assert-us = <100000>;
>                        reset-deassert-us = <1000000>;
>                        reset-gpios = <&gpio7 15 GPIO_ACTIVE_LOW>;
>                };
>        };
> };
>
> I had a suspicion that it might be caused by a missing interrupt
> signal as it runs in poll mode and not irq mode. But fixing that
> with the following additions did not fix phy id auto-detection.
>
> ethphy: ethernet-phy@1 {
>        interrupt-parent = <&gpio1>;
>        interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
> };
>
> pinctrl_enet1: enet1grp {
>        fsl,pins = <
>               MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x40000078 /* X1-80 */
>        >;
> };
>
> But with the mdio reset workaround from above it now uses irq.
>
> Kernel trace:
> kernel: Micrel KSZ8081 or KSZ8091 30be0000.ethernet-1:01: attached PHY driver
>  [Micrel KSZ8081 or KSZ8091] (mii_bus:phy_addr=30be0000.ethernet-1:01, irq=66)
>
> Any suggestions that could help locate the root cause of the issue?
>
> Thanks in advance.
>
> /Bruno

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