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Message-Id: <20200722.130220.825174238852025216.davem@davemloft.net>
Date:   Wed, 22 Jul 2020 13:02:20 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     olteanv@...il.com
Cc:     kuba@...nel.org, netdev@...r.kernel.org,
        alexandre.belloni@...tlin.com, Bryan.Whitehead@...rochip.com,
        Steen.Hegelund@...rochip.com, Horatiu.Vultur@...rochip.com,
        UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net-next] net: mscc: ocelot: fix non-initialized CPU
 port on VSC7514

From: Vladimir Oltean <olteanv@...il.com>
Date: Wed, 22 Jul 2020 11:08:57 +0300

> From: Vladimir Oltean <vladimir.oltean@....com>
> 
> The VSC7514 is marketed as a 10-port switch, however it has 11 physical
> ports (0->10) in the block diagram:
> https://www.microsemi.com/product-directory/ethernet-switches/3992-vsc7514
> (also in the device tree at arch/mips/boot/dts/mscc/ocelot.dtsi)
> 
> Additionally, by architecture it has one more entry in the analyzer
> block, situated right after the physical ports, for the CPU port module.
> This is not a physical port, it only represents a channel for frame
> injection and extraction. That entry for the CPU port is at index 11 in
> the analyzer.
> 
> When the register groups for QSYS_SWITCH_PORT_MODE, SYS_PORT_MODE and
> SYS_PAUSE_CFG are declared to be replicated 11 times, the 11th entry in
> the array of regfields is not initialized, so the CPU port module is not
> initialized either.
> 
> The documentation of QSYS_SWITCH_PORT_MODE for VSC7514 also says that
> this register group is replicated 12 times, so this patch is simply
> reflecting that and not introducing any further inconsistency.
> 
> Fixes: 886e1387c73d ("net: mscc: ocelot: convert QSYS_SWITCH_PORT_MODE and SYS_PORT_MODE to regfields")
> Fixes: 541132f0961a ("net: mscc: ocelot: convert SYS_PAUSE_CFG register access to regfield")
> Reported-by: Bryan Whitehead <bryan.whitehead@...rochip.com>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Applied.

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