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Date:   Mon, 24 Aug 2020 17:00:28 +0800
From:   kernel test robot <lkp@...el.com>
To:     sundeep.lkml@...il.com, davem@...emloft.net, kuba@...nel.org,
        richardcochran@...il.com, netdev@...r.kernel.org,
        sgoutham@...vell.com
Cc:     kbuild-all@...ts.01.org, Aleksey Makarov <amakarov@...vell.com>,
        Subbaraya Sundeep <sbhatta@...vell.com>
Subject: Re: [PATCH v7 net-next 2/3] octeontx2-af: Add support for Marvell
 PTP coprocessor

Hi,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on net-next/master]

url:    https://github.com/0day-ci/linux/commits/sundeep-lkml-gmail-com/Add-PTP-support-for-Octeontx2/20200824-155705
base:   https://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next.git 7611cbb900b4b9a6fe5eca12fb12645c0576a015
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-9 (Debian 9.3.0-15) 9.3.0
reproduce (this is a W=1 build):
        # save the attached .config to linux build tree
        make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@...el.com>

All errors (new ones prefixed by >>):

   drivers/net/ethernet/marvell/octeontx2/af/ptp.c: In function 'get_clock_rate':
>> drivers/net/ethernet/marvell/octeontx2/af/ptp.c:60:26: error: implicit declaration of function 'FIELD_GET'; did you mean 'FOLL_GET'? [-Werror=implicit-function-declaration]
      60 |  ret = CLOCK_BASE_RATE * FIELD_GET(RST_MUL_BITS, cfg);
         |                          ^~~~~~~~~
         |                          FOLL_GET
   cc1: some warnings being treated as errors

# https://github.com/0day-ci/linux/commit/f4c3ceef95befc602b8a36a35cf20edb48a0665d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review sundeep-lkml-gmail-com/Add-PTP-support-for-Octeontx2/20200824-155705
git checkout f4c3ceef95befc602b8a36a35cf20edb48a0665d
vim +60 drivers/net/ethernet/marvell/octeontx2/af/ptp.c

    37	
    38	static u64 get_clock_rate(void)
    39	{
    40		u64 cfg, ret = CLOCK_BASE_RATE * 16;
    41		struct pci_dev *pdev;
    42		void __iomem *base;
    43	
    44		/* To get the input clock frequency with which PTP co-processor
    45		 * block is running the base frequency(50 MHz) needs to be multiplied
    46		 * with multiplier bits present in RST_BOOT register of RESET block.
    47		 * Hence below code gets the multiplier bits from the RESET PCI
    48		 * device present in the system.
    49		 */
    50		pdev = pci_get_device(PCI_VENDOR_ID_CAVIUM,
    51				      PCI_DEVID_OCTEONTX2_RST, NULL);
    52		if (!pdev)
    53			goto error;
    54	
    55		base = pci_ioremap_bar(pdev, PCI_RST_BAR_NO);
    56		if (!base)
    57			goto error_put_pdev;
    58	
    59		cfg = readq(base + RST_BOOT);
  > 60		ret = CLOCK_BASE_RATE * FIELD_GET(RST_MUL_BITS, cfg);
    61	
    62		iounmap(base);
    63	
    64	error_put_pdev:
    65		pci_dev_put(pdev);
    66	
    67	error:
    68		return ret;
    69	}
    70	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org

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