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Date:   Tue, 25 Aug 2020 06:07:56 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     rajur@...lsio.com
Cc:     netdev@...r.kernel.org, vishal@...lsio.com, dt@...lsio.com
Subject: Re: [PATCH net-next] cxgb4: add error handlers to LE intr_handler

From: Raju Rangoju <rajur@...lsio.com>
Date: Tue, 25 Aug 2020 09:25:46 +0530

> cxgb4 does not look for HASHTBLMEMCRCERR and CMDTIDERR
> bits in LE_DB_INT_CAUSE register, but these are enabled
> in LE_DB_INT_ENABLE. So, add error handlers to LE
> interrupt handler to emit a warning or alert message
> for hash table mem crc and cmd tid errors
> 
> Signed-off-by: Raju Rangoju <rajur@...lsio.com>

Applied, thanks.

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