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Message-ID: <aa4b2078-2adf-02a9-094d-bb9695f13cf0@ti.com>
Date: Wed, 26 Aug 2020 08:01:06 -0500
From: Dan Murphy <dmurphy@...com>
To: Andrew Lunn <andrew@...n.ch>
CC: Daniel Gorsulowski <daniel.gorsulowski@....eu>,
<netdev@...r.kernel.org>, <davem@...emloft.net>,
<f.fainelli@...il.com>, <hkallweit1@...il.com>
Subject: Re: [PATCH] net: dp83869: Fix RGMII internal delay configuration
Andrew
On 8/26/20 7:58 AM, Andrew Lunn wrote:
> On Tue, Aug 25, 2020 at 02:57:35PM -0500, Dan Murphy wrote:
>> Andrew
>>
>> On 8/25/20 8:37 AM, Andrew Lunn wrote:
>>> On Tue, Aug 25, 2020 at 02:07:21PM +0200, Daniel Gorsulowski wrote:
>>>> The RGMII control register at 0x32 indicates the states for the bits
>>>> RGMII_TX_CLK_DELAY and RGMII_RX_CLK_DELAY as follows:
>>>>
>>>> RGMII Transmit/Receive Clock Delay
>>>> 0x0 = RGMII transmit clock is shifted with respect to transmit/receive data.
>>>> 0x1 = RGMII transmit clock is aligned with respect to transmit/receive data.
>>>>
>>>> This commit fixes the inversed behavior of these bits
>>>>
>>>> Fixes: 736b25afe284 ("net: dp83869: Add RGMII internal delay configuration")
>>> I Daniel
>>>
>>> I would like to see some sort of response from Dan Murphy about this.
>> Daniel had sent this privately to me and I encouraged him to send it in for
>> review.
>>
>> Unfortunately he did not cc me on the patch he sent to the list.
> You should be able to reply to this email with a Reviewed-by: and
> patchwork will do the right thing.
Yep. I gave my ack on v2 of the patch set
Dan
>
> Andrew
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