netdev - [PATCH 2/4] net: dsa: microchip: Add debug print for XMII port mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Sat,  5 Sep 2020 15:03:23 +0100
From:   Paul Barker <pbarker@...sulko.com>
To:     Woojung Huh <woojung.huh@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Andrew Lunn <andrew@...n.ch>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Florian Fainelli <f.fainelli@...il.com>,
        "David S . Miller" <davem@...emloft.net>
Cc:     Paul Barker <pbarker@...sulko.com>, netdev@...r.kernel.org
Subject: [PATCH 2/4] net: dsa: microchip: Add debug print for XMII port mode

When debug is enabled for this driver, this allows users to confirm that
the correct port mode is in use.

Signed-off-by: Paul Barker <pbarker@...sulko.com>
---
 drivers/net/dsa/microchip/ksz9477.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/net/dsa/microchip/ksz9477.c b/drivers/net/dsa/microchip/ksz9477.c
index a48f5edab561..3e36aa628c9f 100644
--- a/drivers/net/dsa/microchip/ksz9477.c
+++ b/drivers/net/dsa/microchip/ksz9477.c
@@ -1211,21 +1211,25 @@ static void ksz9477_port_setup(struct ksz_device *dev, int port, bool cpu_port)
 		ksz_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
 		switch (dev->interface) {
 		case PHY_INTERFACE_MODE_MII:
+			dev_dbg(dev->dev, "Port%d: MII mode\n", port);
 			ksz9477_set_xmii(dev, 0, &data8);
 			ksz9477_set_gbit(dev, false, &data8);
 			p->phydev.speed = SPEED_100;
 			break;
 		case PHY_INTERFACE_MODE_RMII:
+			dev_dbg(dev->dev, "Port%d: RMII mode\n", port);
 			ksz9477_set_xmii(dev, 1, &data8);
 			ksz9477_set_gbit(dev, false, &data8);
 			p->phydev.speed = SPEED_100;
 			break;
 		case PHY_INTERFACE_MODE_GMII:
+			dev_dbg(dev->dev, "Port%d: GMII mode\n", port);
 			ksz9477_set_xmii(dev, 2, &data8);
 			ksz9477_set_gbit(dev, true, &data8);
 			p->phydev.speed = SPEED_1000;
 			break;
 		default:
+			dev_dbg(dev->dev, "Port%d: RGMII mode\n", port);
 			ksz9477_set_xmii(dev, 3, &data8);
 			ksz9477_set_gbit(dev, true, &data8);
 			data8 &= ~PORT_RGMII_ID_IG_ENABLE;
-- 
2.28.0