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Message-ID: <6069131d-118e-0387-f312-25449a545c2a@microchip.com>
Date:   Mon, 7 Sep 2020 09:14:20 +0200
From:   Nicolas Ferre <nicolas.ferre@...rochip.com>
To:     Parshuram Thombare <pthombar@...ence.com>,
        <alexandre.belloni@...tlin.com>
CC:     <claudiu.beznea@...rochip.com>, <antoine.tenart@...tlin.com>,
        <davem@...emloft.net>, <netdev@...r.kernel.org>,
        <f.fainelli@...il.com>, <linux-kernel@...r.kernel.org>,
        <mparab@...ence.com>
Subject: Re: [PATCH net] net: macb: fix for pause frame receive enable bit

On 05/09/2020 at 10:21, Parshuram Thombare wrote:
> PAE bit of NCFGR register, when set, pauses transmission
> if a non-zero 802.3 classic pause frame is received.
> 
> Fixes: 7897b071ac3b ("net: macb: convert to phylink")
> Signed-off-by: Parshuram Thombare <pthombar@...ence.com>

For the record:
Acked-by: Nicolas Ferre <nicolas.ferre@...rochip.com>

Thanks Parshuram for having found this issue.
Best regards,
   Nicolas

> ---
>   drivers/net/ethernet/cadence/macb_main.c |    3 +--
>   1 files changed, 1 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 6761f40..9179f7b 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -647,8 +647,7 @@ static void macb_mac_link_up(struct phylink_config *config,
>                                  ctrl |= GEM_BIT(GBE);
>                  }
> 
> -               /* We do not support MLO_PAUSE_RX yet */
> -               if (tx_pause)
> +               if (rx_pause)
>                          ctrl |= MACB_BIT(PAE);
> 
>                  macb_set_tx_clk(bp->tx_clk, speed, ndev);
> --
> 1.7.1
> 


-- 
Nicolas Ferre

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