[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Wed, 9 Sep 2020 15:12:31 -0700
From: David Awogbemila <awogbemila@...gle.com>
To: Jakub Kicinski <kuba@...nel.org>
Cc: netdev@...r.kernel.org, Catherine Sullivan <csully@...gle.com>,
Yangchun Fu <yangchun@...gle.com>
Subject: Re: [PATCH net-next v3 4/9] gve: Add support for dma_mask register
On Tue, Sep 8, 2020 at 12:15 PM Jakub Kicinski <kuba@...nel.org> wrote:
>
> On Tue, 8 Sep 2020 11:39:04 -0700 David Awogbemila wrote:
> > + dma_mask = readb(®_bar->dma_mask);
> > + // Default to 64 if the register isn't set
> > + if (!dma_mask)
> > + dma_mask = 64;
> > gve_write_version(®_bar->driver_version);
> > /* Get max queues to alloc etherdev */
> > max_rx_queues = ioread32be(®_bar->max_tx_queues);
> > max_tx_queues = ioread32be(®_bar->max_rx_queues);
> > +
> > + err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
>
> You use the constant 64, not dma_mask?
>
> You jump through hoops to get GFP_DMA allocations yet you don't set the
> right DMA mask. Why would swiotlb become an issue to you if there never
> was any reasonable mask set?
>
> > + if (err) {
> > + dev_err(&pdev->dev, "Failed to set dma mask: err=%d\n", err);
> > + goto abort_with_reg_bar;
> > + }
> > +
> > + err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
>
> dma_set_mask_and_coherent()
>
> > + if (err) {
> > + dev_err(&pdev->dev,
> > + "Failed to set consistent dma mask: err=%d\n", err);
> > + goto abort_with_reg_bar;
> > + }
I think you're right. Setting dma_set_mask_and_coherent(dev, 64)
should mean we no longer have the swiotlb issue. I will drop this
patch altogether.
Powered by blists - more mailing lists