netdev - Re: RTL8402 stops working after hibernate/resume

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Message-ID: <20200917161044.714521ff@ezekiel.suse.cz>
Date:   Thu, 17 Sep 2020 16:10:44 +0200
From:   Petr Tesarik <ptesarik@...e.cz>
To:     Heiner Kallweit <hkallweit1@...il.com>
Cc:     Realtek linux nic maintainers <nic_swsd@...ltek.com>,
        netdev@...r.kernel.org
Subject: Re: RTL8402 stops working after hibernate/resume

Hi Heiner,

any comment on my findings?

On Thu, 3 Sep 2020 10:41:22 +0200
Petr Tesarik <ptesarik@...e.cz> wrote:

> Hi Heiner,
> 
> this issue was on the back-burner for some time, but I've got some
> interesting news now.
> 
> On Sat, 18 Jul 2020 14:07:50 +0200
> Heiner Kallweit <hkallweit1@...il.com> wrote:
> 
> >[...]
> > Maybe the following gives us an idea:
> > Please do "ethtool -d <if>" after boot and after resume from suspend,
> > and check for differences.  
> 
> The register dump did not reveal anything of interest - the only
> differences were in the physical addresses after a device reopen.
> 
> However, knowing that reloading the driver can fix the issue, I copied
> the initialization sequence from init_one() to rtl8169_resume() and
> gave it a try. That works!
> 
> Then I started removing the initialization calls one by one. This
> exercise left me with a call to rtl_init_rxcfg(), which simply sets the
> RxConfig register. In other words, these is the difference between
> 5.8.4 and my working version:
> 
> --- linux-orig/drivers/net/ethernet/realtek/r8169_main.c	2020-09-02 22:43:09.361951750 +0200
> +++ linux/drivers/net/ethernet/realtek/r8169_main.c	2020-09-03 10:36:23.915803703 +0200
> @@ -4925,6 +4925,9 @@
>  
>  	clk_prepare_enable(tp->clk);
>  
> +	if (tp->mac_version == RTL_GIGA_MAC_VER_37)
> +		RTL_W32(tp, RxConfig, RX128_INT_EN | RX_DMA_BURST);
> +
>  	if (netif_running(tp->dev))
>  		__rtl8169_resume(tp);
>  
> This is quite surprising, at least when the device is managed by
> NetworkManager, because then it is closed on wakeup, and the open
> method should call rtl_init_rxcfg() anyway. So, it might be a timing
> issue, or incorrect order of register writes.
> 
> Since I have no idea why the above change fixes my issue, I'm hesitant
> to post it as a patch. It might break other people's systems...

Petr T

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