netdev - Re: [PATCH ethtool] bnxt: Add Broadcom driver support.

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Date:   Tue, 22 Sep 2020 12:45:00 +0530
From:   Vasundhara Volam <vasundhara-v.volam@...adcom.com>
To:     Michal Kubecek <mkubecek@...e.cz>
Cc:     David Miller <davem@...emloft.net>,
        Netdev <netdev@...r.kernel.org>,
        Jakub Kicinski <kuba@...nel.org>,
        Michael Chan <michael.chan@...adcom.com>,
        Edwin Peer <edwin.peer@...adcom.com>,
        Andrew Gospodarek <andrew.gospodarek@...adcom.com>
Subject: Re: [PATCH ethtool] bnxt: Add Broadcom driver support.

On Tue, Sep 22, 2020 at 12:22 PM Michal Kubecek <mkubecek@...e.cz> wrote:
>
> On Tue, Sep 22, 2020 at 11:24:24AM +0530, Vasundhara Volam wrote:
> > On Mon, Sep 21, 2020 at 2:48 PM Michal Kubecek <mkubecek@...e.cz> wrote:
> > > > +             return -1;
> > > > +     }
> > > > +
> > > > +     pcie_stats = (u16 *)(regs->data + BNXT_PXP_REG_LEN);
> > > > +     fprintf(stdout, "PCIe statistics:\n");
> > > > +     fprintf(stdout, "----------------\n");
> > > > +     for (i = 0; i < ARRAY_SIZE(bnxt_pcie_stats); i++) {
> > > > +             pcie_stat = 0;
> > > > +             memcpy(&pcie_stat, &pcie_stats[stats[i].offset],
> > > > +                    stats[i].size * sizeof(u16));
> > >
> > > This will only work on little endian architectures.
> >
> > Data is already converted to host endian order by ETHTOOL_REGS, so it
> > will not be an issue.
>
> It does not work correctly. Assume we are on big endian architecture and
> are reading a 16-bit value (stats[i].size = 1) 0x1234 which is laid out
> in memory as
>
>     ... 12 34 ...
>
> Copying that by memcpy() to the address of 64-bit pcie_stat, you get
>
>    12 34 00 00 00 00 00 00
>
> which represents 0x1234000000000000, not 0x1234. You will also have the
> same problem with 32-bit values (stats[i].size = 2).
You are right. I understood the issue now.

I will modify it to use different size variables based on the size and
convert it to a switch statement.

Thanks.
>
> Michal