lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-Id: <20200928.184412.1736634531612097860.davem@davemloft.net>
Date:   Mon, 28 Sep 2020 18:44:12 -0700 (PDT)
From:   David Miller <davem@...emloft.net>
To:     weifeng.voon@...el.com
Cc:     mcoquelin.stm32@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, joabreu@...opsys.com,
        peppe.cavallaro@...com, andrew@...n.ch, alexandre.torgue@...com,
        boon.leong.ong@...el.com, chen.yong.seow@...el.com,
        mgross@...ux.intel.com, vee.khee.wong@...el.com
Subject: Re: [PATCH v1 net-next] stmmac: intel: Adding ref clock 1us tic
 for LPI cntr

From: Voon Weifeng <weifeng.voon@...el.com>
Date: Mon, 28 Sep 2020 18:12:12 +0800

> From: Rusaimi Amira Ruslan <rusaimi.amira.rusaimi@...el.com>
> 
> Adding reference clock (1us tic) for all LPI timer on Intel platforms.
> The reference clock is derived from ptp clk. This also enables all LPI
> counter.
> 
> Signed-off-by: Rusaimi Amira Ruslan <rusaimi.amira.rusaimi@...el.com>
> Signed-off-by: Voon Weifeng <weifeng.voon@...el.com>

Applied.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ