netdev - RE: [EXT] Re: [PATCH v7,net-next,04/13] drivers: crypto: add Marvell OcteonTX2 CPT PF driver

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Message-ID: <BYAPR18MB2791A8B78FF0E3572C59AD66A0020@BYAPR18MB2791.namprd18.prod.outlook.com>
Date:   Thu, 15 Oct 2020 12:02:10 +0000
From:   Srujana Challa <schalla@...vell.com>
To:     Jakub Kicinski <kuba@...nel.org>
CC:     "herbert@...dor.apana.org.au" <herbert@...dor.apana.org.au>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-crypto@...r.kernel.org" <linux-crypto@...r.kernel.org>,
        Sunil Kovvuri Goutham <sgoutham@...vell.com>,
        Geethasowjanya Akula <gakula@...vell.com>,
        Subbaraya Sundeep Bhatta <sbhatta@...vell.com>,
        Suheil Chandran <schandran@...vell.com>,
        "Narayana Prasad Raju Athreya" <pathreya@...vell.com>
Subject: RE: [EXT] Re: [PATCH v7,net-next,04/13] drivers: crypto: add Marvell
 OcteonTX2 CPT PF driver

> Subject: [EXT] Re: [PATCH v7,net-next,04/13] drivers: crypto: add Marvell
> OcteonTX2 CPT PF driver
> 
> External Email
> 
> ----------------------------------------------------------------------
> On Mon, 12 Oct 2020 16:27:10 +0530 Srujana Challa wrote:
> > +union otx2_cptx_lf_misc_int {
> > +	u64 u;
> > +	struct otx2_cptx_lf_misc_int_s {
> > +		u64 reserved_0:1;
> > +		u64 nqerr:1;
> > +		u64 irde:1;
> > +		u64 nwrp:1;
> > +		u64 reserved_4:1;
> > +		u64 hwerr:1;
> > +		u64 fault:1;
> > +		u64 reserved_7_63:57;
> > +	} s;
> > +};
> 
> AFAIK bitfields don't jive with endianness, please don't use them.
> The Linux kernel is supposed to work regardless of host CPU endian.
These are hardware specific defines. OcteonTX2 SOC and we don't intend
to support BIG endian.