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Date:   Sat, 24 Oct 2020 22:33:25 +0200
From:   Andrew Lunn <>
To:     Tom Rix <>
Cc:     Xu Yilun <>,,,,,,,,,,,
Subject: Re: [RFC PATCH 4/6] ethernet: m10-retimer: add support for retimers
 on Intel MAX 10 BMC

On Sat, Oct 24, 2020 at 10:36:36AM -0700, Tom Rix wrote:
> On 10/24/20 9:39 AM, Andrew Lunn wrote:
> > On Sat, Oct 24, 2020 at 08:03:51AM -0700, Tom Rix wrote:
> >> On 10/23/20 1:45 AM, Xu Yilun wrote:
> >>> This driver supports the ethernet retimers (Parkvale) for the Intel PAC
> >>> (Programmable Acceleration Card) N3000, which is a FPGA based Smart NIC.
> >> Parkvale is a code name, it would be better if the public name was used.
> >>
> >> As this is a physical chip that could be used on other cards,
> >>
> >> I think the generic parts should be split out of intel-m10-bmc-retimer.c
> >>
> >> into a separate file, maybe retimer-c827.c
> > This driver is not really a driver for the Parkvale. That driver is
> > hidden away in the BMC. So we need to be a bit careful with the name,
> > leaving it available for when somebody writes a real Linux driver for
> > retimer.
> Then the parkvale verbage should be removed.
> And the doc ascii diagram be updated with a
> +---------+
> |  BMC    |
> | retimer |
> +---------+

Yes, i would like to get a better understanding of what the BMC is
actually doing, particularly the SFP. Given my current limited
understanding of the driver architecture, i'm not sure it is flexiable
enough to handle other cards where Linux is controlling the SFPs, the
retimer, the host side PCS of the Arria 10, etc. Once Linux is driving
all that, you need phylink, not phylib. The proposed phylib
driver/mdio bus driver actually looks like a hack.


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