netdev - Re: [PATCH net-next v2] net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode

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Date:   Tue, 27 Oct 2020 15:07:38 +0000
From:   Robert Hancock <robert.hancock@...ian.com>
To:     "radheys@...inx.com" <radheys@...inx.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>
CC:     "linux@...linux.org.uk" <linux@...linux.org.uk>,
        "michals@...inx.com" <michals@...inx.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "andrew@...n.ch" <andrew@...n.ch>
Subject: Re: [PATCH net-next v2] net: axienet: Properly handle PCS/PMA PHY for
 1000BaseX mode

On Tue, 2020-10-27 at 14:25 +0000, Radhey Shyam Pandey wrote:
> > -----Original Message-----
> > From: Robert Hancock <robert.hancock@...ian.com>
> > Sent: Tuesday, October 27, 2020 1:15 AM
> > To: Radhey Shyam Pandey <radheys@...inx.com>; davem@...emloft.net;
> > kuba@...nel.org
> > Cc: linux@...linux.org.uk; Michal Simek <michals@...inx.com>;
> > netdev@...r.kernel.org; andrew@...n.ch
> > Subject: Re: [PATCH net-next v2] net: axienet: Properly handle
> > PCS/PMA PHY
> > for 1000BaseX mode
> > 
> > On Mon, 2020-10-26 at 18:57 +0000, Radhey Shyam Pandey wrote:
> > > Thanks for the patch.
> > > 
> > > > -----Original Message-----
> > > > From: Robert Hancock <robert.hancock@...ian.com>
> > > > Sent: Monday, October 26, 2020 11:26 PM
> > > > To: Radhey Shyam Pandey <radheys@...inx.com>;
> > davem@...emloft.net;
> > > > kuba@...nel.org
> > > > Cc: Michal Simek <michals@...inx.com>; linux@...linux.org.uk;
> > > > andrew@...n.ch; netdev@...r.kernel.org; Robert Hancock
> > > > <robert.hancock@...ian.com>
> > > > Subject: [PATCH net-next v2] net: axienet: Properly handle
> > > > PCS/PMA
> > > > PHY for
> > > > 1000BaseX mode
> > > > 
> > > > Update the axienet driver to properly support the Xilinx
> > > > PCS/PMA
> > > > PHY
> > > > component which is used for 1000BaseX and SGMII modes,
> > > > including
> > > > properly configuring the auto-negotiation mode of the PHY and
> > > > reading
> > > > the negotiated state from the PHY.
> > > > 
> > > > Signed-off-by: Robert Hancock <robert.hancock@...ian.com>
> > > > ---
> > > > 
> > > > Resubmit of v2 tagged for net-next.
> > > > 
> > > >  drivers/net/ethernet/xilinx/xilinx_axienet.h  |  3 +
> > > >  .../net/ethernet/xilinx/xilinx_axienet_main.c | 96
> > > > ++++++++++++++-
> > > > ----
> > > >  2 files changed, 73 insertions(+), 26 deletions(-)
> > > > 
> > > > diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h
> > > > b/drivers/net/ethernet/xilinx/xilinx_axienet.h
> > > > index f34c7903ff52..7326ad4d5e1c 100644
> > > > --- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
> > > > +++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
> > > > @@ -419,6 +419,9 @@ struct axienet_local {
> > > >  	struct phylink *phylink;
> > > >  	struct phylink_config phylink_config;
> > > > 
> > > > +	/* Reference to PCS/PMA PHY if used */
> > > > +	struct mdio_device *pcs_phy;
> > > > +
> > > >  	/* Clock for AXI bus */
> > > >  	struct clk *clk;
> > > > 
> > > > diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> > > > b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> > > > index 9aafd3ecdaa4..f46595ef2822 100644
> > > > --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> > > > +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
> > > > @@ -1517,10 +1517,29 @@ static void axienet_validate(struct
> > > > phylink_config *config,
> > > > 
> > > >  	phylink_set(mask, Asym_Pause);
> > > >  	phylink_set(mask, Pause);
> > > > -	phylink_set(mask, 1000baseX_Full);
> > > > -	phylink_set(mask, 10baseT_Full);
> > > > -	phylink_set(mask, 100baseT_Full);
> > > > -	phylink_set(mask, 1000baseT_Full);
> > > > +
> > > > +	switch (state->interface) {
> > > > +	case PHY_INTERFACE_MODE_NA:
> > > > +	case PHY_INTERFACE_MODE_1000BASEX:
> > > > +	case PHY_INTERFACE_MODE_SGMII:
> > > > +	case PHY_INTERFACE_MODE_GMII:
> > > > +	case PHY_INTERFACE_MODE_RGMII:
> > > > +	case PHY_INTERFACE_MODE_RGMII_ID:
> > > > +	case PHY_INTERFACE_MODE_RGMII_RXID:
> > > > +	case PHY_INTERFACE_MODE_RGMII_TXID:
> > > > +		phylink_set(mask, 1000baseX_Full);
> > > > +		phylink_set(mask, 1000baseT_Full);
> > > > +		if (state->interface ==
> > > > PHY_INTERFACE_MODE_1000BASEX)
> > > > +			break;
> > > 
> > > 100BaseT and 10BaseT can be set in PHY_INTERFACE_MODE_MII if we
> > > allow fallthrough here.
> > 
> > Not quite sure what you are saying here?
> 
> I was saying to allow switch case fall through.

Ah, I see. Yes, that would work to save a couple duplicate lines - just
not sure if using the switch fall-through is preferable. Any thoughts
from people on what's preferred?

-- 
Robert Hancock
Senior Hardware Designer, Advanced Technologies 
www.calian.com