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Message-ID: <20201031052259.pmhkmlaq5sqndtwu@skbuf>
Date: Sat, 31 Oct 2020 07:22:59 +0200
From: Ioana Ciornei <ciorneiioana@...il.com>
To: Andrew Lunn <andrew@...n.ch>
Cc: Heiner Kallweit <hkallweit1@...il.com>,
Ioana Ciornei <ciorneiioana@...il.com>,
Russell King <linux@...linux.org.uk>,
Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
linux-kernel@...r.kernel.org,
Ioana Ciornei <ioana.ciornei@....com>,
Alexandru Ardelean <alexandru.ardelean@...log.com>,
Andre Edich <andre.edich@...rochip.com>,
Antoine Tenart <atenart@...nel.org>,
Baruch Siach <baruch@...s.co.il>,
Christophe Leroy <christophe.leroy@....fr>,
Dan Murphy <dmurphy@...com>,
Divya Koppera <Divya.Koppera@...rochip.com>,
Florian Fainelli <f.fainelli@...il.com>,
Hauke Mehrtens <hauke@...ke-m.de>,
Jerome Brunet <jbrunet@...libre.com>,
Kavya Sree Kotagiri <kavyasree.kotagiri@...rochip.com>,
Linus Walleij <linus.walleij@...aro.org>,
Marco Felsch <m.felsch@...gutronix.de>,
Marek Vasut <marex@...x.de>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Mathias Kresin <dev@...sin.me>,
Maxim Kochetkov <fido_max@...ox.ru>,
Michael Walle <michael@...le.cc>,
Neil Armstrong <narmstrong@...libre.com>,
Nisar Sayed <Nisar.Sayed@...rochip.com>,
Oleksij Rempel <o.rempel@...gutronix.de>,
Philippe Schenker <philippe.schenker@...adex.com>,
Willy Liu <willy.liu@...ltek.com>,
Yuiko Oshino <yuiko.oshino@...rochip.com>
Subject: Re: [PATCH net-next 00/19] net: phy: add support for shared
interrupts (part 1)
On Sat, Oct 31, 2020 at 12:36:27AM +0100, Andrew Lunn wrote:
> > > - Every PHY driver gains a .handle_interrupt() implementation that, for
> > > the most part, would look like below:
> > >
> > > irq_status = phy_read(phydev, INTR_STATUS);
> > > if (irq_status < 0) {
> > > phy_error(phydev);
> > > return IRQ_NONE;
> > > }
> > >
> > > if (irq_status == 0)
> >
> > Here I have a concern, bits may be set even if the respective interrupt
> > source isn't enabled. Therefore we may falsely blame a device to have
> > triggered the interrupt. irq_status should be masked with the actually
> > enabled irq source bits.
>
> Hi Heiner
>
> I would say that is a driver implementation detail, for each driver to
> handle how it needs to handle it. I've seen some hardware where the
> interrupt status is already masked with the interrupt enabled
> bits. I've soon other hardware where it is not.
>
> For example code, what is listed above is O.K. The real implementation
> in a driver need knowledge of the hardware.
>
Hi,
As Andrew said, that is just an example code that could work for some
devices but should be extended depending on how the actual PHY is
working.
For example, the VSC8584 will still be trigerring the link state machine
just on the link change interrupt, I am not changing this:
static irqreturn_t vsc8584_handle_interrupt(struct phy_device *phydev)
{
irqreturn_t ret;
int irq_status;
irq_status = phy_read(phydev, MII_VSC85XX_INT_STATUS);
if (irq_status < 0)
return IRQ_NONE;
/* Timestamping IRQ does not set a bit in the global INT_STATUS, so
* irq_status would be 0.
*/
ret = vsc8584_handle_ts_interrupt(phydev);
if (!(irq_status & MII_VSC85XX_INT_MASK_MASK))
return ret;
if (irq_status & MII_VSC85XX_INT_MASK_EXT)
vsc8584_handle_macsec_interrupt(phydev);
if (irq_status & MII_VSC85XX_INT_MASK_LINK_CHG)
phy_trigger_machine(phydev);
return IRQ_HANDLED;
}
Ioana
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