netdev - Re: [PATCH] phy: phylink: Fix CuSFP issue in phylink

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Message-ID: <20201110151248.GA1551@shell.armlinux.org.uk>
Date:   Tue, 10 Nov 2020 15:12:48 +0000
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     Bjarni Jonasson <bjarni.jonasson@...rochip.com>
Cc:     Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        UNGLinuxDriver <UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH] phy: phylink: Fix CuSFP issue in phylink

On Tue, Nov 10, 2020 at 03:16:34PM +0100, Bjarni Jonasson wrote:
> 
> Russell King - ARM Linux admin writes:
> 
> > On Tue, Nov 10, 2020 at 11:06:42AM +0100, Bjarni Jonasson wrote:
> >> There is an issue with the current phylink driver and CuSFPs which
> >> results in a callback to the phylink validate function without any
> >> advertisement capabilities.  The workaround (in this changeset)
> >> is to assign capabilities if a 1000baseT SFP is identified.
> >
> > How does this happen?  Which PHY is being used?
> 
> This occurs just by plugging in the CuSFP.
> None of the CuSFPs we have tested are working.
> This is a dump from 3 different CuSFPs, phy regs 0-3:
> FS SFP: 01:40:79:49 
> HP SFP: 01:40:01:49
> Marvel SFP: 01:40:01:49
> This was working before the delayed mac config was implemented (in dec
> 2019).

You're dumping PHY registers 0 and 1 there, not 0 through 3, which
the values confirm. I don't recognise the format either. PHY registers
are always 16-bit.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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