netdev - Re: Re: realtek PHY commit bbc4d71d63549 causes regression

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAK8P3a3ABKRYg_wyjz_zUPd+gE1=f3PsVs5Ac-y1jpa0+Kt1fA@mail.gmail.com>
Date:   Fri, 13 Nov 2020 22:26:53 +0100
From:   Arnd Bergmann <arnd@...nel.org>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Jernej Škrabec <jernej.skrabec@...il.com>,
        Ard Biesheuvel <ardb@...nel.org>,
        Daniel Thompson <daniel.thompson@...aro.org>,
        Sumit Garg <sumit.garg@...aro.org>,
        Alex Bennée <alex.bennee@...aro.org>,
        Masami Hiramatsu <mhiramat@...nel.org>,
        Steve McIntyre <steve@...val.com>,
        "open list:BPF JIT for MIPS (32-BIT AND 64-BIT)" 
        <netdev@...r.kernel.org>, Willy Liu <willy.liu@...ltek.com>,
        "David S. Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>,
        Sasha Levin <sashal@...nel.org>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Masahisa Kojima <masahisa.kojima@...aro.org>,
        Ilias Apalodimas <ilias.apalodimas@...aro.org>
Subject: Re: Re: realtek PHY commit bbc4d71d63549 causes regression

On Fri, Nov 13, 2020 at 5:57 PM Andrew Lunn <andrew@...n.ch> wrote:
>
> > > Hi Arnd
> > >
> > > This PHY driver bug hiding DT bug is always hard to handle. We have
> > > been though it once before with the Atheros PHY. All the buggy DT
> > > files were fixed in about one cycle.
> >
> > Do you have a link to the problem for the Atheros PHY?
>
> commit cd28d1d6e52e740130745429b3ff0af7cbba7b2c
> Author: Vinod Koul <vkoul@...nel.org>
> Date:   Mon Jan 21 14:43:17 2019 +0530
>
>     net: phy: at803x: Disable phy delay for RGMII mode
>
>     For RGMII mode, phy delay should be disabled. Add this case along
>     with disable delay routines.
>
>     Signed-off-by: Vinod Koul <vkoul@...nel.org>
>     Signed-off-by: David S. Miller <davem@...emloft.net>
>
> and
>
> commit 6d4cd041f0af5b4c8fc742b4a68eac22e420e28c
> Author: Vinod Koul <vkoul@...nel.org>
> Date:   Thu Feb 21 15:53:15 2019 +0530
>
>     net: phy: at803x: disable delay only for RGMII mode
>
>     Per "Documentation/devicetree/bindings/net/ethernet.txt" RGMII mode
>     should not have delay in PHY whereas RGMII_ID and RGMII_RXID/RGMII_TXID
>     can have delay in PHY.
>
>     So disable the delay only for RGMII mode and enable for other modes.
>     Also treat the default case as disabled delays.
>
>     Fixes: cd28d1d6e52e: ("net: phy: at803x: Disable phy delay for RGMII mode")
>
> Looking at the git history, it seems like it also took two attempts to
> get it working correctly, but the time between the two patches was
> much shorted for the atheros PHY.

ok, thanks.

> > I agree this makes the problem harder, but I have still hope that
> > we can come up with a code solution that can deal with this
> > one board that needs to have the correct settings applied as well
> > as the others on which we have traditionally ignored them.
> >
> > As I understand it so far, the reason this board needs a different
> > setting is that the strapping pins are wired incorrectly, while all
> > other boards set them right and work correctly by default. I would
> > much prefer a way to identify this behavior in dts and have the phy
> > driver just warn when it finds a mismatch between the internal
> > delay setting in DT and the strapping pins but keep using the
> > setting from the strapping pins when there is a conflict.
>
> So what you are suggesting is that the pine board, and any other board
> which comes along in the future using this PHY which really wants
> RGMII, needs a boolean DT property:
>
> "realtek,IRealyDoWantRGMII_IAmNotBroken"
>
> in the PHY node?
>
> And if it is missing, we ignore when the MAC asks for RGMII and
> actually do RGMII_ID?

Something of that sort. I also see a similar patch in KSZ9031
now, see 7dd8f0ba88fc ("arm: dts: imx6qdl-udoo: fix rgmii phy-mode
for ksz9031 phy")

As this exact mismatch between rgmii and rgmii-id mode is apparently
a more widespread problem, the best workaround I can think of
is that we redefine the phy-mode="rgmii" property to actually mean
"use rgmii mode and let the phy driver decide the delay configuration",
with a new string to mean specifically rgmii mode with no delay.

That way, the existing behavior of all phy drivers would become
conformant, and we could change the one board that needs to
disable the internal delay to use the new property.

If we have three drivers that confused the meaning of
phy-mode="rgmii", there may still be others.

> We might also need to talk to the FreeBSD folks.
>
> https://reviews.freebsd.org/D13591
>
> Do we need to ask them to be bug compatible to Linux? Are the same DT
> file being used?

We are moving towards sharing the dts files better, yes.
In a lot of cases this does mean bug compatibility, the same
way that the DT support on Linux still has some quirks that
go back to bugs in MacOS or AIX on PowerPC.

> That still leaves ACPI systems. Do we want to stuff this DT property
> into an ACPI table? That seems to go against what ACPI people say
> saying, ACPI is not DT with an extra wrapper around it.

As far as I know, the only affected ACPI system has the same
issue and it should be handled the same way, also not requiring
a firmware update.

      Arnd