netdev - Re: [PATCH v2 1/3] dt-bindings: net: fsl-fec add mdc/mdio bitbang option

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Message-ID: <CABkfQAERoudFeUnmLYgh4WKcJ3sh4aahKk6RjA5VHfnb3swpFQ@mail.gmail.com>
Date:   Fri, 4 Dec 2020 21:09:00 +0100
From:   Adrien Grassein <adrien.grassein@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Florian Fainelli <f.fainelli@...il.com>, fugang.duan@....com,
        davem@...emloft.net, kuba@...nel.org,
        Rob Herring <robh+dt@...nel.org>, netdev@...r.kernel.org,
        DTML <devicetree@...r.kernel.org>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/3] dt-bindings: net: fsl-fec add mdc/mdio bitbang option

Hi all,

I'm not a kernel expert, but I try to find why these patches were
needed in the FSL/Boundary kernel.

I found that the pin muxing in the original kernel was not good for FEC.
It's now working well with the mainline code.

You can delete these patches.

Thanks a lot,
Regards,

Adrien

Le lun. 30 nov. 2020 à 23:26, Andrew Lunn <andrew@...n.ch> a écrit :
>
> > >> I am currently upstreaming the "Nitrogen 8m Mini board" that seems to not use a
> > >> "normal" mdio bus but a "bitbanged" one with the fsl fec driver.
> > >
> > > Any idea why?
> > >
> > > Anyway, you should not replicate code, don't copy bitbanging code into
> > > the FEC. Just use the existing bit-banger MDIO bus master driver.
> >
> > Right there should be no need for you to modify the FEC driver at all,
> > there is an existing generic bitbanged MDIO bus driver here:
>
> Hi Florian
>
> Speculation on my part, until i hear back on the Why? question, but
> i'm guessing the board has a wrong pullup on the MDIO line. It takes
> too long for the PHY/FEC to pull the line low at the default
> 2.5MHz. bit-banging is much slower, so it works.
>
> If i'm right, there is a much simpler fix for this. Use the
> clock-frequency property for the MDIO bus to slow the clock down.
>
>         Andrew