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Message-ID: <160822756622.3138.4566292085941876073@kwain.local>
Date:   Thu, 17 Dec 2020 18:52:46 +0100
From:   Antoine Tenart <atenart@...hat.com>
To:     netdev@...r.kernel.org, stefanc@...vell.com
Cc:     thomas.petazzoni@...tlin.com, davem@...emloft.net,
        nadavh@...vell.com, ymarkman@...vell.com,
        linux-kernel@...r.kernel.org, stefanc@...vell.com, kuba@...nel.org,
        linux@...linux.org.uk, mw@...ihalf.com, andrew@...n.ch,
        rmk+kernel@...linux.org.uk, lironh@...vell.com
Subject: Re: [PATCH net] net: mvpp2: prs: fix PPPoE with ipv6 packet parse

Hi Stefan,

Quoting stefanc@...vell.com (2020-12-17 18:23:11)
> From: Stefan Chulski <stefanc@...vell.com>
> 
> Current PPPoE+IPv6 entry is jumping to 'next-hdr'
> field and not to 'DIP' field as done for IPv4.
> 
> Fixes: db9d7d36eecc ("net: mvpp2: Split the PPv2 driver to a dedicated directory")

That's not the commit introducing the issue. You can use
`git log --follow` to go further back (or directly pointing to the old
mvpp2.c file).

Thanks!
Antoine

> Reported-by: Liron Himi <lironh@...vell.com>
> Signed-off-by: Stefan Chulski <stefanc@...vell.com>
> ---
>  drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c | 5 +++--
>  1 file changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
> index b9e5b08..1a272c2 100644
> --- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
> +++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_prs.c
> @@ -1655,8 +1655,9 @@ static int mvpp2_prs_pppoe_init(struct mvpp2 *priv)
>         mvpp2_prs_sram_next_lu_set(&pe, MVPP2_PRS_LU_IP6);
>         mvpp2_prs_sram_ri_update(&pe, MVPP2_PRS_RI_L3_IP6,
>                                  MVPP2_PRS_RI_L3_PROTO_MASK);
> -       /* Skip eth_type + 4 bytes of IPv6 header */
> -       mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + 4,
> +       /* Jump to DIP of IPV6 header */
> +       mvpp2_prs_sram_shift_set(&pe, MVPP2_ETH_TYPE_LEN + 8 +
> +                                MVPP2_MAX_L3_ADDR_SIZE,
>                                  MVPP2_PRS_SRAM_OP_SEL_SHIFT_ADD);
>         /* Set L3 offset */
>         mvpp2_prs_sram_offset_set(&pe, MVPP2_PRS_SRAM_UDF_TYPE_L3,
> -- 
> 1.9.1
> 

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