netdev - Re: [RFC PATCH v1 7/7] powerpc/bpf: Implement extended BPF on PPC32

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Message-ID: <20201217061133.lnfnhbzvikgtjb3i@ast-mbp>
Date:   Wed, 16 Dec 2020 22:11:33 -0800
From:   Alexei Starovoitov <alexei.starovoitov@...il.com>
To:     Christophe Leroy <christophe.leroy@...roup.eu>
Cc:     Benjamin Herrenschmidt <benh@...nel.crashing.org>,
        Paul Mackerras <paulus@...ba.org>,
        Michael Ellerman <mpe@...erman.id.au>, ast@...nel.org,
        daniel@...earbox.net, andrii@...nel.org, kafai@...com,
        songliubraving@...com, yhs@...com, john.fastabend@...il.com,
        kpsingh@...omium.org, naveen.n.rao@...ux.ibm.com,
        sandipan@...ux.ibm.com, linux-kernel@...r.kernel.org,
        linuxppc-dev@...ts.ozlabs.org, netdev@...r.kernel.org,
        bpf@...r.kernel.org
Subject: Re: [RFC PATCH v1 7/7] powerpc/bpf: Implement extended BPF on PPC32

On Wed, Dec 16, 2020 at 10:07:37AM +0000, Christophe Leroy wrote:
> Implement Extended Berkeley Packet Filter on Powerpc 32
> 
> Test result with test_bpf module:
> 
> 	test_bpf: Summary: 378 PASSED, 0 FAILED, [354/366 JIT'ed]

nice!

> Registers mapping:
> 
> 	[BPF_REG_0] = r11-r12
> 	/* function arguments */
> 	[BPF_REG_1] = r3-r4
> 	[BPF_REG_2] = r5-r6
> 	[BPF_REG_3] = r7-r8
> 	[BPF_REG_4] = r9-r10
> 	[BPF_REG_5] = r21-r22 (Args 9 and 10 come in via the stack)
> 	/* non volatile registers */
> 	[BPF_REG_6] = r23-r24
> 	[BPF_REG_7] = r25-r26
> 	[BPF_REG_8] = r27-r28
> 	[BPF_REG_9] = r29-r30
> 	/* frame pointer aka BPF_REG_10 */
> 	[BPF_REG_FP] = r31
> 	/* eBPF jit internal registers */
> 	[BPF_REG_AX] = r19-r20
> 	[TMP_REG] = r18
> 
> As PPC32 doesn't have a redzone in the stack,
> use r17 as tail call counter.
> 
> r0 is used as temporary register as much as possible. It is referenced
> directly in the code in order to avoid misuse of it, because some
> instructions interpret it as value 0 instead of register r0
> (ex: addi, addis, stw, lwz, ...)
> 
> The following operations are not implemented:
> 
> 		case BPF_ALU64 | BPF_DIV | BPF_X: /* dst /= src */
> 		case BPF_ALU64 | BPF_MOD | BPF_X: /* dst %= src */
> 		case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
> 
> The following operations are only implemented for power of two constants:
> 
> 		case BPF_ALU64 | BPF_MOD | BPF_K: /* dst %= imm */
> 		case BPF_ALU64 | BPF_DIV | BPF_K: /* dst /= imm */

Those are sensible limitations. MOD and DIV are rare, but XADD is common.
Please consider doing it as a cmpxchg loop in the future.

Also please run test_progs. It will give a lot better coverage than test_bpf.ko