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Date:   Wed, 30 Dec 2020 17:07:38 +0800
From:   DENG Qingfang <dqfext@...il.com>
To:     Heiner Kallweit <hkallweit1@...il.com>
Cc:     "David S. Miller" <davem@...emloft.net>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        Landen Chao <Landen.Chao@...iatek.com>,
        Marc Zyngier <maz@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Philipp Zabel <p.zabel@...gutronix.de>,
        Russell King <linux@...linux.org.uk>,
        Sean Wang <sean.wang@...iatek.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Vladimir Oltean <olteanv@...il.com>,
        linux-kernel@...r.kernel.org, netdev <netdev@...r.kernel.org>,
        Weijie Gao <weijie.gao@...iatek.com>,
        Chuanhong Guo <gch981213@...il.com>,
        Linus Walleij <linus.walleij@...aro.org>,
        René van Dorst <opensource@...rst.com>
Subject: Re: Registering IRQ for MT7530 internal PHYs

Hi Heiner,
Thanks for your reply.

On Wed, Dec 30, 2020 at 3:39 PM Heiner Kallweit <hkallweit1@...il.com> wrote:
> I don't think that's the best option.

I'm well aware of that.

> You may want to add a PHY driver for your chip. Supposedly it
> supports at least PHY suspend/resume. You can use the RTL8366RB
> PHY driver as template.

There's no MediaTek PHY driver yet. Do we really need a new one just
for the interrupts?

> > +     dev_info_ratelimited(priv->dev, "interrupt status: 0x%08x\n", val);
> > +     dev_info_ratelimited(priv->dev, "interrupt enable: 0x%08x\n", mt7530_read(priv, MT7530_SYS_INT_EN));
> > +
> This is debug code to be removed in the final version?

Yes.

> > +     for (phy = 0; phy < MT7530_NUM_PHYS; phy++) {
> > +             if (val & BIT(phy)) {
> > +                     unsigned int child_irq;
> > +
> > +                     child_irq = irq_find_mapping(priv->irq_domain, phy);
> > +                     handle_nested_irq(child_irq);
> > +                     handled = true;
> > +             }
> > +     }
> > +
> > +     return handled ? IRQ_HANDLED : IRQ_NONE;
>
> IRQ_RETVAL() could be used here.

Good to know :)

>
> > +}
> > +
> > +static void mt7530_irq_mask(struct irq_data *d)
> > +{
> > +     struct mt7530_priv *priv = irq_data_get_irq_chip_data(d);
> > +
> > +     priv->irq_enable &= ~BIT(d->hwirq);
>
> Here you don't actually do something. HW doesn't support masking
> interrupt generation for a port?

priv->irq_enable will be written to MT7530_SYS_INT_EN in
mt7530_irq_bus_sync_unlock. You can think of it as an inverted mask.

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