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Message-ID: <20210115112911.glhs4lxygpqddrm3@skbuf>
Date:   Fri, 15 Jan 2021 13:29:11 +0200
From:   Vladimir Oltean <olteanv@...il.com>
To:     Tobias Waldekranz <tobias@...dekranz.com>
Cc:     davem@...emloft.net, kuba@...nel.org, andrew@...n.ch,
        vivien.didelot@...il.com, f.fainelli@...il.com,
        netdev@...r.kernel.org
Subject: Re: [PATCH net-next 2/2] net: dsa: mv88e6xxx: Only allow LAG offload
 on supported hardware

On Fri, Jan 15, 2021 at 01:15:23PM +0200, Vladimir Oltean wrote:
> On Fri, Jan 15, 2021 at 11:58:34AM +0100, Tobias Waldekranz wrote:
> > There are chips that do have Global 2 registers, and therefore trunk
>                        ~~
>                        do not
> > mapping/mask tables are not available. Additionally Global 2 register
> > support is build-time optional, so we have to make sure that it is
> > compiled in.
> > 
> > Fixes: 57e661aae6a8 ("net: dsa: mv88e6xxx: Link aggregation support")
> > Signed-off-by: Tobias Waldekranz <tobias@...dekranz.com>
> > ---
> >  drivers/net/dsa/mv88e6xxx/chip.c | 4 ++++
> >  drivers/net/dsa/mv88e6xxx/chip.h | 9 +++++++++
> >  2 files changed, 13 insertions(+)
> > 
> > diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
> > index dcb1726b68cc..c48d166c2a70 100644
> > --- a/drivers/net/dsa/mv88e6xxx/chip.c
> > +++ b/drivers/net/dsa/mv88e6xxx/chip.c
> > @@ -5385,9 +5385,13 @@ static bool mv88e6xxx_lag_can_offload(struct dsa_switch *ds,
> >  				      struct net_device *lag,
> >  				      struct netdev_lag_upper_info *info)
> >  {
> > +	struct mv88e6xxx_chip *chip = ds->priv;
> >  	struct dsa_port *dp;
> >  	int id, members = 0;
> >  
> > +	if (!mv88e6xxx_has_lag(chip))
> > +		return false;
> > +
> >  	id = dsa_lag_id(ds->dst, lag);
> >  	if (id < 0 || id >= ds->num_lag_ids)
> >  		return false;
> > diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h
> > index 3543055bcb51..333b4fab5aa2 100644
> > --- a/drivers/net/dsa/mv88e6xxx/chip.h
> > +++ b/drivers/net/dsa/mv88e6xxx/chip.h
> > @@ -662,6 +662,15 @@ static inline bool mv88e6xxx_has_pvt(struct mv88e6xxx_chip *chip)
> >  	return chip->info->pvt;
> >  }
> >  
> > +static inline bool mv88e6xxx_has_lag(struct mv88e6xxx_chip *chip)
> > +{
> > +#if (defined(CONFIG_NET_DSA_MV88E6XXX_GLOBAL2))
> > +	return chip->info->global2_addr != 0;
> > +#else
> > +	return false;
> > +#endif
> > +}
> > +
> 
> Should we also report ds->num_lag_ids = 0 if !mv88e6xxx_has_lag()?
> 
> >  static inline unsigned int mv88e6xxx_num_databases(struct mv88e6xxx_chip *chip)
> >  {
> >  	return chip->info->num_databases;
> > -- 
> > 2.17.1
> > 

Actually in mv88e6xxx_detect there is this:

	err = mv88e6xxx_g2_require(chip);
	if (err)
		return err;


#else /* !CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 */

static inline int mv88e6xxx_g2_require(struct mv88e6xxx_chip *chip)
{
	if (chip->info->global2_addr) {
		dev_err(chip->dev, "this chip requires CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 enabled\n");
		return -EOPNOTSUPP;
	}

	return 0;
}

#endif

So CONFIG_NET_DSA_MV88E6XXX_GLOBAL2 is optional only if you use chips
that don't support the global2 area. Otherwise it is mandatory. So I
would update the commit message to not say "Additionally Global 2
register support is build-time optional", because it doesn't matter.

So I would simplify it to:

static inline bool mv88e6xxx_has_lag(struct mv88e6xxx_chip *chip)
{
	return !!chip->info->global2_addr;
}

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