netdev - RE: [EXT] Re: [PATCH net-next,1/3] octeontx2-af: Mailbox changes for 98xx CPT block

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Date:   Tue, 19 Jan 2021 05:00:15 +0000
From:   Srujana Challa <schalla@...vell.com>
To:     Saeed Mahameed <saeed@...nel.org>,
        "davem@...emloft.net" <davem@...emloft.net>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "kuba@...nel.org" <kuba@...nel.org>,
        Sunil Kovvuri Goutham <sgoutham@...vell.com>,
        Geethasowjanya Akula <gakula@...vell.com>,
        Subbaraya Sundeep Bhatta <sbhatta@...vell.com>,
        Suheil Chandran <schandran@...vell.com>,
        "Narayana Prasad Raju Athreya" <pathreya@...vell.com>,
        Jerin Jacob Kollanukkaran <jerinj@...vell.com>,
        Mahipal Challa <mchalla@...vell.com>
Subject: RE: [EXT] Re: [PATCH net-next,1/3] octeontx2-af: Mailbox changes for
 98xx CPT block

> On Wed, 2021-01-13 at 20:50 +0530, Srujana Challa wrote:
> > This patch changes CPT mailbox message format to support new block
> > CPT1 in 98xx silicon.
> >
> > cpt_rd_wr_reg ->
> >     Modify cpt_rd_wr_reg mailbox and its handler to
> >     accommodate new block CPT1.
> > cpt_lf_alloc ->
> >     Modify cpt_lf_alloc mailbox and its handler to
> >     configure LFs from a block address out of multiple
> >     blocks of same type. If a PF/VF needs to configure
> >     LFs from both the blocks then this mbox should be
> >     called twice.
> >
> > Signed-off-by: Mahipal Challa <mchalla@...vell.com>
> > Signed-off-by: Srujana Challa <schalla@...vell.com>
> > ---
> >  .../net/ethernet/marvell/octeontx2/af/mbox.h  |  2 +
> >  .../ethernet/marvell/octeontx2/af/rvu_cpt.c   | 41 +++++++++++----
> > ----
> >  2 files changed, 27 insertions(+), 16 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > index f919283ddc34..cbbab070f22b 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> > @@ -1071,6 +1071,7 @@ struct cpt_rd_wr_reg_msg {
> >  	u64 *ret_val;
> >  	u64 val;
> >  	u8 is_write;
> > +	int blkaddr;
> >  };
> >
> >  struct cpt_lf_alloc_req_msg {
> > @@ -1078,6 +1079,7 @@ struct cpt_lf_alloc_req_msg {
> >  	u16 nix_pf_func;
> >  	u16 sso_pf_func;
> >  	u16 eng_grpmsk;
> > +	int blkaddr;
> >  };
> >
> >  #endif /* MBOX_H */
> > diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
> > b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
> > index 35261d52c997..b6de4b95a72a 100644
> > --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
> > +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c
> > @@ -65,13 +65,13 @@ int rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
> >  	int num_lfs, slot;
> >  	u64 val;
> >
> > +	blkaddr = req->blkaddr ? req->blkaddr : BLKADDR_CPT0;
> > +	if (blkaddr != BLKADDR_CPT0 && blkaddr != BLKADDR_CPT1)
> > +		return -ENODEV;
> > +
> >
> 
> Just out of curiosity, why do you need to check against your driver's internals
> function calls ?
> 
> who calls this function: I Couldn't find any caller !
>
This function is a mailbox handler, it will be triggered when Marvell crypto(CPT)
driver sends a CPT_LF_ALLOC mailbox message.  I have added check for blkaddr
because there is a chance for sending invalid blkaddr through mailbox request
from CPT VF drivers.

> $ git grep rvu_mbox_handler_cpt_lf_alloc
> drivers/net/ethernet/marvell/octeontx2/af/rvu_cpt.c:int
> rvu_mbox_handler_cpt_lf_alloc(struct rvu *rvu,
> 
>