[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <38734f00-e672-e694-1344-35f4dd68c90c@microchip.com>
Date: Thu, 21 Jan 2021 09:19:12 +0000
From: <Claudiu.Beznea@...rochip.com>
To: <michael@...le.cc>, <netdev@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: <Nicolas.Ferre@...rochip.com>, <davem@...emloft.net>
Subject: Re: [PATCH] net: macb: ignore tx_clk if MII is used
Hi Michael,
On 20.01.2021 21:43, Michael Walle wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> If the MII interface is used, the PHY is the clock master, thus don't
> set the clock rate. On Zynq-7000, this will prevent the following
> warning:
> macb e000b000.ethernet eth0: unable to generate target frequency: 25000000 Hz
>
Since in this case the PHY provides the TX clock and it provides the proper
rate based on link speed, the MACB driver should not handle the bp->tx_clk
at all (MACB driver uses this clock only for setting the proper rate on it
based on link speed). So, I believe the proper fix would be to not pass the
tx_clk at all in device tree. This clock is optional for MACB driver.
Thank you,
Claudiu Beznea
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
> drivers/net/ethernet/cadence/macb_main.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
> index 814a5b10141d..472bf8f220bc 100644
> --- a/drivers/net/ethernet/cadence/macb_main.c
> +++ b/drivers/net/ethernet/cadence/macb_main.c
> @@ -470,6 +470,10 @@ static void macb_set_tx_clk(struct macb *bp, int speed)
> if (!bp->tx_clk || (bp->caps & MACB_CAPS_CLK_HW_CHG))
> return;
>
> + /* In case of MII the PHY is the clock master */
> + if (bp->phy_interface == PHY_INTERFACE_MODE_MII)
> + return;
> +
> switch (speed) {
> case SPEED_10:
> rate = 2500000;
> --
> 2.20.1
>
Powered by blists - more mailing lists