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Message-ID: <CAKOOJTw_RfYfFunhHKTD6k73FvFObVb5Xx7hK8uPUUGJpuTzuw@mail.gmail.com>
Date: Mon, 25 Jan 2021 10:35:27 -0800
From: Edwin Peer <edwin.peer@...adcom.com>
To: Parav Pandit <parav@...dia.com>
Cc: Saeed Mahameed <saeed@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Jason Gunthorpe <jgg@...dia.com>,
netdev <netdev@...r.kernel.org>,
"linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>,
Alexander Duyck <alexander.duyck@...il.com>,
Sridhar Samudrala <sridhar.samudrala@...el.com>,
David Ahern <dsahern@...nel.org>,
Kiran Patil <kiran.patil@...el.com>,
Jacob Keller <jacob.e.keller@...el.com>,
"Ertman, David M" <david.m.ertman@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Saeed Mahameed <saeedm@...dia.com>
Subject: Re: [pull request][net-next V10 00/14] Add mlx5 subfunction support
On Mon, Jan 25, 2021 at 2:57 AM Parav Pandit <parav@...dia.com> wrote:
> > Apologies for the tardy question out of left field, but I've been
> > thinking about this some more. If I recall, the primary motivation for
> > this was a means to effectively address more VFs? But, why can't the
> > device simply expose more bus numbers?
>
> Several weeks back, Jason already answered this VF scaling question from you at discussion [1].
>
> [1] https://lore.kernel.org/netdev/20201216023928.GG552508@nvidia.com/
True, although I didn't really consider the full cost argument at the
time because the core answer was "They can't", however, the fact is,
PCI can.
Regards,
Edwin Peer
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