netdev - Re: [PATCH v8 net-next 02/15] dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree

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Message-ID: <20210206154004.4aaa32ec@kicinski-fedora-pc1c0hjn.dhcp.thefacebook.com>
Date:   Sat, 6 Feb 2021 15:40:04 -0800
From:   Jakub Kicinski <kuba@...nel.org>
To:     <stefanc@...vell.com>
Cc:     <netdev@...r.kernel.org>, <thomas.petazzoni@...tlin.com>,
        <davem@...emloft.net>, <nadavh@...vell.com>,
        <ymarkman@...vell.com>, <linux-kernel@...r.kernel.org>,
        <linux@...linux.org.uk>, <mw@...ihalf.com>, <andrew@...n.ch>,
        <rmk+kernel@...linux.org.uk>, <atenart@...nel.org>,
        Konstantin Porotchkin <kostap@...vell.com>
Subject: Re: [PATCH v8 net-next 02/15] dts: marvell: add CM3 SRAM memory to
 cp11x ethernet device tree

On Sat, 6 Feb 2021 18:45:48 +0200 stefanc@...vell.com wrote:
> From: Konstantin Porotchkin <kostap@...vell.com>
> 
> CM3 SRAM address space would be used for Flow Control configuration.
> 
> Signed-off-by: Stefan Chulski <stefanc@...vell.com>
> Signed-off-by: Konstantin Porotchkin <kostap@...vell.com>

Isn't there are requirement to CC the DT mailing list and Rob on all
device tree patches?  Maybe someone can clarify I know it's required
when adding bindings..