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Message-ID: <20210310092533.GA6819@lst.de>
Date: Wed, 10 Mar 2021 10:25:33 +0100
From: Christoph Hellwig <hch@....de>
To: Robin Murphy <robin.murphy@....com>
Cc: Christoph Hellwig <hch@....de>, Joerg Roedel <joro@...tes.org>,
Will Deacon <will@...nel.org>, Li Yang <leoyang.li@....com>,
freedreno@...ts.freedesktop.org, kvm@...r.kernel.org,
Michael Ellerman <mpe@...erman.id.au>,
linuxppc-dev@...ts.ozlabs.org, dri-devel@...ts.freedesktop.org,
virtualization@...ts.linux-foundation.org,
iommu@...ts.linux-foundation.org, netdev@...r.kernel.org,
linux-arm-msm@...r.kernel.org,
David Woodhouse <dwmw2@...radead.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 14/17] iommu: remove DOMAIN_ATTR_DMA_USE_FLUSH_QUEUE
On Wed, Mar 10, 2021 at 10:15:01AM +0100, Christoph Hellwig wrote:
> On Thu, Mar 04, 2021 at 03:25:27PM +0000, Robin Murphy wrote:
> > On 2021-03-01 08:42, Christoph Hellwig wrote:
> >> Use explicit methods for setting and querying the information instead.
> >
> > Now that everyone's using iommu-dma, is there any point in bouncing this
> > through the drivers at all? Seems like it would make more sense for the x86
> > drivers to reflect their private options back to iommu_dma_strict (and
> > allow Intel's caching mode to override it as well), then have
> > iommu_dma_init_domain just test !iommu_dma_strict &&
> > domain->ops->flush_iotlb_all.
>
> Hmm. I looked at this, and kill off ->dma_enable_flush_queue for
> the ARM drivers and just looking at iommu_dma_strict seems like a
> very clear win.
>
> OTOH x86 is a little more complicated. AMD and intel defaul to lazy
> mode, so we'd have to change the global iommu_dma_strict if they are
> initialized. Also Intel has not only a "static" option to disable
> lazy mode, but also a "dynamic" one where it iterates structure. So
> I think on the get side we're stuck with the method, but it still
> simplifies the whole thing.
Actually... Just mirroring the iommu_dma_strict value into
struct iommu_domain should solve all of that with very little
boilerplate code.
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