netdev - Re: [net 05/11] can: flexcan: flexcan_chip_freeze(): fix chip freeze for missing bitrate

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Date:   Tue, 16 Mar 2021 10:02:43 +0100
From:   Angelo Dureghello <angelo@...nel-space.org>
To:     Marc Kleine-Budde <mkl@...gutronix.de>, netdev@...r.kernel.org
Cc:     davem@...emloft.net, kuba@...nel.org, linux-can@...r.kernel.org,
        kernel@...gutronix.de
Subject: Re: [net 05/11] can: flexcan: flexcan_chip_freeze(): fix chip freeze
 for missing bitrate

Hi all,

On 16/03/21 9:20 AM, Marc Kleine-Budde wrote:
> From: Angelo Dureghello <angelo@...nel-space.org>
>
> For cases when flexcan is built-in, bitrate is still not set at
> registering. So flexcan_chip_freeze() generates:
>
> [    1.860000] *** ZERO DIVIDE ***   FORMAT=4
> [    1.860000] Current process id is 1
> [    1.860000] BAD KERNEL TRAP: 00000000
> [    1.860000] PC: [<402e70c8>] flexcan_chip_freeze+0x1a/0xa8
>
> To allow chip freeze, using an hardcoded timeout when bitrate is still
> not set.
>
> Fixes: ec15e27cc890 ("can: flexcan: enable RX FIFO after FRZ/HALT valid")
> Link: https://lore.kernel.org/r/20210315231510.650593-1-angelo@kernel-space.org
> Signed-off-by: Angelo Dureghello <angelo@...nel-space.org>
> [mkl: use if instead of ? operator]
> Signed-off-by: Marc Kleine-Budde <mkl@...gutronix.de>
> ---
>  drivers/net/can/flexcan.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> index 134c05757a3b..57f3635ad8d7 100644
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -697,9 +697,15 @@ static int flexcan_chip_disable(struct flexcan_priv *priv)
>  static int flexcan_chip_freeze(struct flexcan_priv *priv)
>  {
>  	struct flexcan_regs __iomem *regs = priv->regs;
> -	unsigned int timeout = 1000 * 1000 * 10 / priv->can.bittiming.bitrate;
> +	unsigned int timeout;
> +	u32 bitrate = priv->can.bittiming.bitrate;
>  	u32 reg;
>  
> +	if (bitrate)
> +		timeout = 1000 * 1000 * 10 / bitrate;
> +	else
> +		timeout = FLEXCAN_TIMEOUT_US / 10;
> +
>  	reg = priv->read(&regs->mcr);
>  	reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT;
>  	priv->write(reg, &regs->mcr);

?

Just curious, what's the issue with my "?" ?


Regards,
--
Angelo Dureghello