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Message-ID: <65137c60-4fbe-6772-6d48-ac360930f62b@pengutronix.de>
Date: Tue, 16 Mar 2021 17:00:25 +0100
From: Ahmad Fatoum <a.fatoum@...gutronix.de>
To: Marc Kleine-Budde <mkl@...gutronix.de>, netdev@...r.kernel.org
Cc: Joakim Zhang <qiangqing.zhang@....com>, linux-can@...r.kernel.org,
kernel@...gutronix.de, kuba@...nel.org, davem@...emloft.net
Subject: [BUG] Re: [net 3/6] can: flexcan: invoke flexcan_chip_freeze() to
enter freeze mode
Hello Joakim, Marc,
On 01.03.21 12:20, Marc Kleine-Budde wrote:
> From: Joakim Zhang <qiangqing.zhang@....com>
>
> Invoke flexcan_chip_freeze() to enter freeze mode, since need poll
> freeze mode acknowledge.
>
> Fixes: e955cead03117 ("CAN: Add Flexcan CAN controller driver")
> Link: https://lore.kernel.org/r/20210218110037.16591-4-qiangqing.zhang@nxp.com
> Signed-off-by: Joakim Zhang <qiangqing.zhang@....com>
> Signed-off-by: Marc Kleine-Budde <mkl@...gutronix.de>
> ---
> drivers/net/can/flexcan.c | 12 +++++++-----
> 1 file changed, 7 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
> index e66a51dbea0a..134c05757a3b 100644
> --- a/drivers/net/can/flexcan.c
> +++ b/drivers/net/can/flexcan.c
> @@ -1480,10 +1480,13 @@ static int flexcan_chip_start(struct net_device *dev)
>
> flexcan_set_bittiming(dev);
>
> + /* set freeze, halt */
> + err = flexcan_chip_freeze(priv);
> + if (err)
> + goto out_chip_disable;
With v5.12-rc3, both my FlexCAN controllers on an i.MX6Q now divide by zero
on probe because priv->can.bittiming.bitrate == 0 inside of flexcan_chip_freeze.
Reverting this patch fixes it.
> +
> /* MCR
> *
> - * enable freeze
> - * halt now
> * only supervisor access
> * enable warning int
> * enable individual RX masking
> @@ -1492,9 +1495,8 @@ static int flexcan_chip_start(struct net_device *dev)
> */
> reg_mcr = priv->read(®s->mcr);
> reg_mcr &= ~FLEXCAN_MCR_MAXMB(0xff);
> - reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT | FLEXCAN_MCR_SUPV |
> - FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_IRMQ | FLEXCAN_MCR_IDAM_C |
> - FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
> + reg_mcr |= FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | FLEXCAN_MCR_IRMQ |
> + FLEXCAN_MCR_IDAM_C | FLEXCAN_MCR_MAXMB(priv->tx_mb_idx);
>
> /* MCR
> *
>
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