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Message-Id: <20210324165023.32352-5-kabel@kernel.org>
Date: Wed, 24 Mar 2021 17:50:20 +0100
From: Marek Behún <kabel@...nel.org>
To: netdev@...r.kernel.org, Andrew Lunn <andrew@...n.ch>,
"David S . Miller" <davem@...emloft.net>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <rmk+kernel@...linux.org.uk>, kuba@...nel.org
Cc: Marek Behún <kabel@...nel.org>
Subject: [PATCH net-next 4/7] net: phy: marvell10g: add MACTYPE definitions for 88X3310/88X3310P
Add all MACTYPE definitions for 88X3310/88X3310P.
In order to have consistent naming, rename
MV_V2_PORT_CTRL_MACTYPE_RATE_MATCH to
MV_V2_PORT_CTRL_MACTYPE_10GR_RATE_MATCH.
Signed-off-by: Marek Behún <kabel@...nel.org>
---
drivers/net/phy/marvell10g.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/net/phy/marvell10g.c b/drivers/net/phy/marvell10g.c
index 70639b9393f3..46e853f2d41b 100644
--- a/drivers/net/phy/marvell10g.c
+++ b/drivers/net/phy/marvell10g.c
@@ -80,8 +80,15 @@ enum {
MV_V2_PORT_CTRL = 0xf001,
MV_V2_PORT_CTRL_SWRST = BIT(15),
MV_V2_PORT_CTRL_PWRDOWN = BIT(11),
- MV_V2_PORT_CTRL_MACTYPE_MASK = 0x7,
- MV_V2_PORT_CTRL_MACTYPE_RATE_MATCH = 0x6,
+ MV_V2_PORT_CTRL_MACTYPE_MASK = 0x7,
+ MV_V2_PORT_CTRL_MACTYPE_RXAUI = 0x0,
+ MV_V2_PORT_CTRL_MACTYPE_XAUI_RATE_MATCH = 0x1,
+ MV_V2_PORT_CTRL_MACTYPE_RXAUI_RATE_MATCH = 0x2,
+ MV_V2_PORT_CTRL_MACTYPE_XAUI = 0x3,
+ MV_V2_PORT_CTRL_MACTYPE_10GBASER = 0x4,
+ MV_V2_PORT_CTRL_MACTYPE_10GBASER_NO_SGMII_AN = 0x5,
+ MV_V2_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH = 0x6,
+ MV_V2_PORT_CTRL_MACTYPE_USXGMII = 0x7,
/* Temperature control/read registers (88X3310 only) */
MV_V2_TEMP_CTRL = 0xf08a,
MV_V2_TEMP_CTRL_MASK = 0xc000,
@@ -480,7 +487,7 @@ static int mv3310_config_init(struct phy_device *phydev)
if (val < 0)
return val;
priv->rate_match = ((val & MV_V2_PORT_CTRL_MACTYPE_MASK) ==
- MV_V2_PORT_CTRL_MACTYPE_RATE_MATCH);
+ MV_V2_PORT_CTRL_MACTYPE_10GBASER_RATE_MATCH);
/* Enable EDPD mode - saving 600mW */
return mv3310_set_edpd(phydev, ETHTOOL_PHY_EDPD_DFLT_TX_MSECS);
--
2.26.2
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