lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 31 Mar 2021 19:35:24 +0100
From:   Russell King - ARM Linux admin <linux@...linux.org.uk>
To:     danilokrummrich@...develop.de
Cc:     Andrew Lunn <andrew@...n.ch>, davem@...emloft.net,
        hkallweit1@...il.com, netdev@...r.kernel.org,
        linux-kernel@...r.kernel.org, jeremy.linton@....com
Subject: Re: [PATCH 2/2] net: mdio: support c45 peripherals on c22 busses

On Wed, Mar 31, 2021 at 07:58:33PM +0200, danilokrummrich@...develop.de wrote:
> For this cited change the only thing happening is that if get_phy_device()
> already failed for probing with is_c45==false (C22 devices) it tries to
> probe with is_c45==true (C45 devices) which then either results into actual
> C45 frame transfers or indirect accesses by calling mdiobus_c45_*() functions.

Please explain why and how a PHY may not appear to be present using
C22 frames to read the ID registers, but does appear to be present
when using C22 frames to the C45 indirect registers - and summarise
which PHYs have this behaviour.

It seems very odd that any PHY would only implement C45 indirect
registers in the C22 register space.

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ