netdev - Re: [PATCH net v2 2/2] net: dsa: lantiq_gswip: Configure all remaining GSWIP_MII

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Message-ID: <19b78806-ff51-567c-5121-674db706682f@gmail.com>
Date:   Thu, 8 Apr 2021 11:49:15 -0700
From:   Florian Fainelli <f.fainelli@...il.com>
To:     Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
        hauke@...ke-m.de, andrew@...n.ch, vivien.didelot@...il.com,
        olteanv@...il.com, netdev@...r.kernel.org
Cc:     davem@...emloft.net, kuba@...nel.org, linux@...linux.org.uk,
        linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH net v2 2/2] net: dsa: lantiq_gswip: Configure all
 remaining GSWIP_MII_CFG bits



On 4/8/2021 11:38 AM, Martin Blumenstingl wrote:
> There are a few more bits in the GSWIP_MII_CFG register for which we
> did rely on the boot-loader (or the hardware defaults) to set them up
> properly.
> 
> For some external RMII PHYs we need to select the GSWIP_MII_CFG_RMII_CLK
> bit and also we should un-set it for non-RMII PHYs. The
> GSWIP_MII_CFG_RMII_CLK bit is ignored for other PHY connection modes.
> 
> The GSWIP IP also supports in-band auto-negotiation for RGMII PHYs when
> the GSWIP_MII_CFG_RGMII_IBS bit is set. Clear this bit always as there's
> no known hardware which uses this (so it is not tested yet).
> 
> Clear the xMII isolation bit when set at initialization time if it was
> previously set by the bootloader. Not doing so could lead to no traffic
> (neither RX nor TX) on a port with this bit set.
> 
> While here, also add the GSWIP_MII_CFG_RESET bit. We don't need to
> manage it because this bit is self-clearning when set. We still add it
> here to get a better overview of the GSWIP_MII_CFG register.
> 
> Fixes: 14fceff4771e51 ("net: dsa: Add Lantiq / Intel DSA driver for vrx200")
> Cc: stable@...r.kernel.org
> Suggested-by: Hauke Mehrtens <hauke@...ke-m.de>
> Acked-by: Hauke Mehrtens <hauke@...ke-m.de>
> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@...glemail.com>

Reviewed-by: Florian Fainelli <f.fainelli@...il.com>
-- 
Florian