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Message-Id: <20210409225346.432312-1-opensource@vdorst.com>
Date: Sat, 10 Apr 2021 00:53:46 +0200
From: René van Dorst <opensource@...rst.com>
To: "David S. Miller" <davem@...emloft.net>,
Andrew Lunn <andrew@...n.ch>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Jakub Kicinski <kuba@...nel.org>,
Landen Chao <Landen.Chao@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Russell King <linux@...linux.org.uk>,
Sean Wang <sean.wang@...iatek.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
linux-mediatek@...ts.infradead.org, netdev@...r.kernel.org
Cc: Sergio Paracuellos <sergio.paracuellos@...il.com>,
Frank Wunderlich <frank-w@...lic-files.de>,
DENG Qingfang <dqfext@...il.com>,
René van Dorst <opensource@...rst.com>
Subject: [PATCH net-next] net: dsa: mt7530: Add support for EEE features
This patch adds EEE support.
Signed-off-by: René van Dorst <opensource@...rst.com>
---
drivers/net/dsa/mt7530.c | 50 ++++++++++++++++++++++++++++++++++++++++
drivers/net/dsa/mt7530.h | 16 ++++++++++++-
2 files changed, 65 insertions(+), 1 deletion(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index 2bd1bab71497..daa87b0baa65 100644
--- a/drivers/net/dsa/mt7530.c
+++ b/drivers/net/dsa/mt7530.c
@@ -2568,6 +2568,11 @@ static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
mcr |= PMCR_TX_FC_EN;
if (rx_pause)
mcr |= PMCR_RX_FC_EN;
+
+ if (mode == MLO_AN_PHY && phydev &&
+ !(priv->eee_disabled & BIT(port)) &&
+ phy_init_eee(phydev, 0) >= 0)
+ mcr |= PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100;
}
mt7530_set(priv, MT7530_PMCR_P(port), mcr);
@@ -2800,6 +2805,49 @@ mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
return priv->info->phy_write(ds, port, regnum, val);
}
+static int mt753x_get_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr, pmsr;
+
+ e->eee_enabled = !(priv->eee_disabled & BIT(port));
+
+ if (e->eee_enabled) {
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
+ e->tx_lpi_timer = GET_LPI_THRESH(eeecr);
+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
+ }
+
+ return 0;
+}
+
+static int mt753x_set_mac_eee(struct dsa_switch *ds, int port,
+ struct ethtool_eee *e)
+{
+ struct mt7530_priv *priv = ds->priv;
+ u32 eeecr;
+
+ if (e->eee_enabled) {
+ if (e->tx_lpi_timer > 0xFFF)
+ return -EINVAL;
+ priv->eee_disabled &= ~BIT(port);
+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
+ eeecr &= ~(LPI_THRESH_MASK | LPI_MODE_EN);
+ if (!e->tx_lpi_enabled)
+ /* Force LPI Mode without a delay */
+ eeecr |= LPI_MODE_EN;
+ eeecr |= SET_LPI_THRESH(e->tx_lpi_timer);
+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
+ } else {
+ priv->eee_disabled |= BIT(port);
+ }
+
+ return 0;
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
.setup = mt753x_setup,
@@ -2835,6 +2883,8 @@ static const struct dsa_switch_ops mt7530_switch_ops = {
.phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
.phylink_mac_link_down = mt753x_phylink_mac_link_down,
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
+ .get_mac_eee = mt753x_get_mac_eee,
+ .set_mac_eee = mt753x_set_mac_eee,
};
static const struct mt753x_info mt753x_table[] = {
diff --git a/drivers/net/dsa/mt7530.h b/drivers/net/dsa/mt7530.h
index ec36ea5dfd57..02f983df26bc 100644
--- a/drivers/net/dsa/mt7530.h
+++ b/drivers/net/dsa/mt7530.h
@@ -257,6 +257,8 @@ enum mt7530_vlan_port_attr {
#define PMCR_RX_EN BIT(13)
#define PMCR_BACKOFF_EN BIT(9)
#define PMCR_BACKPR_EN BIT(8)
+#define PMCR_FORCE_EEE1G BIT(7)
+#define PMCR_FORCE_EEE100 BIT(6)
#define PMCR_TX_FC_EN BIT(5)
#define PMCR_RX_FC_EN BIT(4)
#define PMCR_FORCE_SPEED_1000 BIT(3)
@@ -288,7 +290,17 @@ enum mt7530_vlan_port_attr {
PMCR_TX_EN | PMCR_RX_EN | \
PMCR_TX_FC_EN | PMCR_RX_FC_EN | \
PMCR_FORCE_SPEED_1000 | \
- PMCR_FORCE_FDX | PMCR_FORCE_LNK)
+ PMCR_FORCE_FDX | PMCR_FORCE_LNK | \
+ PMCR_FORCE_EEE1G | PMCR_FORCE_EEE100)
+
+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
+#define WAKEUP_TIME_1000(x) (((x) & 0xFF) << 24)
+#define WAKEUP_TIME_100(x) (((x) & 0xFF) << 16)
+#define LPI_THRESH_MASK GENMASK(15, 4)
+#define LPI_THRESH_SHT 4
+#define SET_LPI_THRESH(x) (((x) << LPI_THRESH_SHT) & LPI_THRESH_MASK)
+#define GET_LPI_THRESH(x) (((x) & LPI_THRESH_MASK) >> LPI_THRESH_SHT)
+#define LPI_MODE_EN BIT(0)
#define MT7530_PMSR_P(x) (0x3008 + (x) * 0x100)
#define PMSR_EEE1G BIT(7)
@@ -761,6 +773,7 @@ struct mt753x_info {
* registers
* @p6_interface Holding the current port 6 interface
* @p5_intf_sel: Holding the current port 5 interface select
+ * @eee_disabled: Holding the current eee user disabled bits
*/
struct mt7530_priv {
struct device *dev;
@@ -778,6 +791,7 @@ struct mt7530_priv {
unsigned int p5_intf_sel;
u8 mirror_rx;
u8 mirror_tx;
+ u8 eee_disabled;
struct mt7530_port ports[MT7530_NUM_PORTS];
/* protect among processes for registers access*/
--
2.30.2
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