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Message-ID: <20210413050743.GA10274@linux.intel.com>
Date: Tue, 13 Apr 2021 13:07:43 +0800
From: Wong Vee Khee <vee.khee.wong@...ux.intel.com>
To: Richard Cochran <richardcochran@...il.com>
Cc: Giuseppe Cavallaro <peppe.cavallaro@...com>,
Alexandre Torgue <alexandre.torgue@...com>,
Jose Abreu <joabreu@...opsys.com>,
"David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Voon Weifeng <weifeng.voon@...el.com>,
Ong Boon Leong <boon.leong.ong@...el.com>,
netdev@...r.kernel.org, linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH net-next v3 1/1] net: stmmac: Add support for external
trigger timestamping
On Sun, Apr 11, 2021 at 08:10:55AM -0700, Richard Cochran wrote:
> On Sun, Apr 11, 2021 at 10:40:28AM +0800, Wong Vee Khee wrote:
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
> > index 60566598d644..60e17fd24aba 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c
> > @@ -296,6 +296,13 @@ static int intel_crosststamp(ktime_t *device,
> >
> > intel_priv = priv->plat->bsp_priv;
> >
> > + /* Both internal crosstimestamping and external triggered event
> > + * timestamping cannot be run concurrently.
> > + */
> > + if (priv->plat->ext_snapshot_en)
> > + return -EBUSY;
> > +
> > + mutex_lock(&priv->aux_ts_lock);
>
> Lock, then ...
>
> > /* Enable Internal snapshot trigger */
> > acr_value = readl(ptpaddr + PTP_ACR);
> > acr_value &= ~PTP_ACR_MASK;
> > @@ -321,6 +328,7 @@ static int intel_crosststamp(ktime_t *device,
> > acr_value = readl(ptpaddr + PTP_ACR);
> > acr_value |= PTP_ACR_ATSFC;
> > writel(acr_value, ptpaddr + PTP_ACR);
> > + mutex_unlock(&priv->aux_ts_lock);
>
> unlock, then ...
>
> > /* Trigger Internal snapshot signal
> > * Create a rising edge by just toggle the GPO1 to low
> > @@ -355,6 +363,8 @@ static int intel_crosststamp(ktime_t *device,
> > *system = convert_art_to_tsc(art_time);
> > }
> >
> > + /* Release the mutex */
> > + mutex_unlock(&priv->aux_ts_lock);
>
> unlock again? Huh?
>
Nice catch. Fix in v4.
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac.h b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > index c49debb62b05..abadcd8cdc41 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac.h
> > @@ -239,6 +239,9 @@ struct stmmac_priv {
> > int use_riwt;
> > int irq_wake;
> > spinlock_t ptp_lock;
> > + /* Mutex lock for Auxiliary Snapshots */
> > + struct mutex aux_ts_lock;
>
> In the comment, please be specific about which data are protected.
> For example:
>
> /* Protects auxiliary snapshot registers from concurrent access. */
>
> > @@ -163,6 +166,43 @@ static void get_ptptime(void __iomem *ptpaddr, u64 *ptp_time)
> > *ptp_time = ns;
> > }
> >
> > +static void timestamp_interrupt(struct stmmac_priv *priv)
> > +{
> > + struct ptp_clock_event event;
> > + unsigned long flags;
> > + u32 num_snapshot;
> > + u32 ts_status;
> > + u32 tsync_int;
>
> Please group same types together (u32) in a one-line list.
>
> > + u64 ptp_time;
> > + int i;
> > +
> > + tsync_int = readl(priv->ioaddr + GMAC_INT_STATUS) & GMAC_INT_TSIE;
> > +
> > + if (!tsync_int)
> > + return;
> > +
> > + /* Read timestamp status to clear interrupt from either external
> > + * timestamp or start/end of PPS.
> > + */
> > + ts_status = readl(priv->ioaddr + GMAC_TIMESTAMP_STATUS);
>
> Reading this register has a side effect of clearing status? If so,
> doesn't it need protection against concurrent access?
>
> The function, intel_crosststamp() also reads this bit.
>
The following check is introduced in intel_crosststamp() to avoid this:
/* Both internal crosstimestamping and external triggered event
* timestamping cannot be run concurrently.
*/
if (priv->plat->ext_snapshot_en)
return -EBUSY;
> > + if (!priv->plat->ext_snapshot_en)
> > + return;
>
> Doesn't this test come too late? Setting ts_status just cleared the
> bit used by the other code path.
>
As per Synopsys's design, all bits except Bits[27:25] gets cleared when
this register is read.
> > + num_snapshot = (ts_status & GMAC_TIMESTAMP_ATSNS_MASK) >>
> > + GMAC_TIMESTAMP_ATSNS_SHIFT;
> > +
> > + for (i = 0; i < num_snapshot; i++) {
> > + spin_lock_irqsave(&priv->ptp_lock, flags);
> > + get_ptptime(priv->ptpaddr, &ptp_time);
> > + spin_unlock_irqrestore(&priv->ptp_lock, flags);
> > + event.type = PTP_CLOCK_EXTTS;
> > + event.index = 0;
> > + event.timestamp = ptp_time;
> > + ptp_clock_event(priv->ptp_clock, &event);
> > + }
> > +}
> > +
>
> > diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
> > index b164ae22e35f..d668c33a0746 100644
> > --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
> > +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ptp.c
> > @@ -135,9 +135,13 @@ static int stmmac_enable(struct ptp_clock_info *ptp,
> > {
> > struct stmmac_priv *priv =
> > container_of(ptp, struct stmmac_priv, ptp_clock_ops);
> > + void __iomem *ptpaddr = priv->ptpaddr;
> > + void __iomem *ioaddr = priv->hw->pcsr;
> > struct stmmac_pps_cfg *cfg;
> > int ret = -EOPNOTSUPP;
> > unsigned long flags;
> > + u32 intr_value;
> > + u32 acr_value;
>
> Please group same types together.
>
Fix in v4.
> Thanks,
> Richard
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