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Date: Tue, 13 Apr 2021 09:09:37 +0200 From: Michal Vokáč <michal.vokac@...ft.com> To: Andrew Lunn <andrew@...n.ch> Cc: Jonathan McDowell <noodles@...th.li>, Florian Fainelli <f.fainelli@...il.com>, David Miller <davem@...emloft.net>, netdev@...r.kernel.org Subject: Re: Broken imx6 to QCA8334 connection since PHYLIB to PHYLINK conversion On 12. 04. 21 16:14, Andrew Lunn wrote: >> [1] https://elixir.bootlin.com/linux/v5.12-rc7/source/arch/arm/boot/dts/imx6dl-yapp4-common.dtsi#L101 > > &fec { > pinctrl-names = "default"; > pinctrl-0 = <&pinctrl_enet>; > phy-mode = "rgmii-id"; > phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; > phy-reset-duration = <20>; > phy-supply = <&sw2_reg>; > phy-handle = <ðphy0>; > status = "okay"; > > mdio { > #address-cells = <1>; > #size-cells = <0>; > > phy_port2: phy@1 { > reg = <1>; > }; > > phy_port3: phy@2 { > reg = <2>; > }; > > switch@10 { > compatible = "qca,qca8334"; > reg = <10>; > > switch_ports: ports { > #address-cells = <1>; > #size-cells = <0>; > > ethphy0: port@0 { > reg = <0>; > label = "cpu"; > phy-mode = "rgmii-id"; > ethernet = <&fec>; > > fixed-link { > speed = <1000>; > full-duplex; > }; > }; > > The fec phy-handle = <ðphy0>; is pointing to the PHY of switch port > 0. This seems wrong. I do not understand. Why this seems wrong? The switch has four ports. Ports 2 and 3 have a PHY and are connected to the transformers/RJ45 connectors. Port 0 is MII/RMII/RGMII of the switch. Port 6 (not used) is a SerDes. > Does the FEC have a PHY? Do you connect the FEC > and the SWITCH at the RGMII level? Or with two back to back PHYs? > > If you are doing it RGMII level, the FEC also needs a fixed-link. The FEC does not have PHY and is connected to the switch at RGMII level. Adding the fixed-link { speed = <1000>; full-duplex; }; subnode to FEC does not help. Michal
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