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Message-Id: <20210416234225.3715819-3-olteanv@gmail.com>
Date: Sat, 17 Apr 2021 02:42:22 +0300
From: Vladimir Oltean <olteanv@...il.com>
To: Jakub Kicinski <kuba@...nel.org>,
"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
Po Liu <po.liu@....com>
Cc: Claudiu Manoil <claudiu.manoil@....com>,
Alex Marginean <alexandru.marginean@....com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
Russell King - ARM Linux admin <linux@...linux.org.uk>,
Andrew Lunn <andrew@...n.ch>, Michael Walle <michael@...le.cc>,
Vladimir Oltean <vladimir.oltean@....com>
Subject: [PATCH net-next 2/5] dt-bindings: net: fsl: enetc: add the IERB documentation
From: Vladimir Oltean <vladimir.oltean@....com>
Mention the required compatible string and base address for the
Integrated Endpoint Register Block node.
Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>
---
.../devicetree/bindings/net/fsl-enetc.txt | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/Documentation/devicetree/bindings/net/fsl-enetc.txt b/Documentation/devicetree/bindings/net/fsl-enetc.txt
index b7034ccbc1bd..9b9a3f197e2d 100644
--- a/Documentation/devicetree/bindings/net/fsl-enetc.txt
+++ b/Documentation/devicetree/bindings/net/fsl-enetc.txt
@@ -102,3 +102,18 @@ Example:
full-duplex;
};
};
+
+* Integrated Endpoint Register Block bindings
+
+Optionally, the fsl_enetc driver can probe on the Integrated Endpoint Register
+Block, which preconfigures the FIFO limits for the ENETC ports. This is a node
+with the following properties:
+
+- reg : Specifies the address in the SoC memory space.
+- compatible : Must be "fsl,ls1028a-enetc-ierb".
+
+Example:
+ ierb@...800000 {
+ compatible = "fsl,ls1028a-enetc-ierb";
+ reg = <0x01 0xf0800000 0x0 0x10000>;
+ };
--
2.25.1
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