netdev - RE: [PATCH net-next 5/5] net: enetc: add support for flow control

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Message-ID: <AM0PR04MB6754B48B5F0C5B166783680696499@AM0PR04MB6754.eurprd04.prod.outlook.com>
Date:   Mon, 19 Apr 2021 09:07:23 +0000
From:   Claudiu Manoil <claudiu.manoil@....com>
To:     Vladimir Oltean <olteanv@...il.com>,
        Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        Po Liu <po.liu@....com>
CC:     Alexandru Marginean <alexandru.marginean@....com>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Guo <shawnguo@...nel.org>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        Russell King - ARM Linux admin <linux@...linux.org.uk>,
        Andrew Lunn <andrew@...n.ch>, Michael Walle <michael@...le.cc>,
        Vladimir Oltean <vladimir.oltean@....com>
Subject: RE: [PATCH net-next 5/5] net: enetc: add support for flow control



>-----Original Message-----
>From: Vladimir Oltean <olteanv@...il.com>
>Sent: Saturday, April 17, 2021 2:42 AM
>To: Jakub Kicinski <kuba@...nel.org>; David S. Miller
><davem@...emloft.net>; netdev@...r.kernel.org; Po Liu
><po.liu@....com>
>Cc: Claudiu Manoil <claudiu.manoil@....com>; Alexandru Marginean
><alexandru.marginean@....com>; Rob Herring <robh+dt@...nel.org>;
>Shawn Guo <shawnguo@...nel.org>; linux-arm-kernel@...ts.infradead.org;
>devicetree@...r.kernel.org; Russell King - ARM Linux admin
><linux@...linux.org.uk>; Andrew Lunn <andrew@...n.ch>; Michael Walle
><michael@...le.cc>; Vladimir Oltean <vladimir.oltean@....com>
>Subject: [PATCH net-next 5/5] net: enetc: add support for flow control
>
>From: Vladimir Oltean <vladimir.oltean@....com>
>
>In the ENETC receive path, a frame received by the MAC is first stored
>in a 256KB 'FIFO' memory, then transferred to DRAM when enqueuing it to
>the RX ring. The FIFO is a shared resource for all ENETC ports, but
>every port keeps track of its own memory utilization, on RX and on TX.
>
>There is a setting for RX rings through which they can either operate in
>'lossy' mode (where the lack of a free buffer causes an immediate
>discard of the frame) or in 'lossless' mode (where the lack of a free
>buffer in the ring makes the frame stay longer in the FIFO).
>
>In turn, when the memory utilization of the FIFO exceeds a certain
>margin, the MAC can be configured to emit PAUSE frames.
>
>There is enough FIFO memory to buffer up to 3 MTU-sized frames per RX
>port while not jeopardizing the other use cases (jumbo frames), and
>also not consume bytes from the port TX allocations. Also, 3 MTU-sized
>frames worth of memory is enough to ensure zero loss for 64 byte packets
>at 1G line rate.
>
>Signed-off-by: Vladimir Oltean <vladimir.oltean@....com>

Reviewed-by: Claudiu Manoil <claudiu.manoil@....com>