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Message-ID: <fa2347b25d25e71f891e50f6f789e421@walle.cc>
Date: Tue, 20 Apr 2021 15:27:24 +0200
From: Michael Walle <michael@...le.cc>
To: Vladimir Oltean <olteanv@...il.com>
Cc: Jakub Kicinski <kuba@...nel.org>,
"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
Po Liu <po.liu@....com>,
Claudiu Manoil <claudiu.manoil@....com>,
Alex Marginean <alexandru.marginean@....com>,
Rob Herring <robh+dt@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
Russell King - ARM Linux admin <linux@...linux.org.uk>,
Andrew Lunn <andrew@...n.ch>,
Vladimir Oltean <vladimir.oltean@....com>
Subject: Re: [PATCH net-next 0/5] Flow control for NXP ENETC
Hi Vladimir,
Am 2021-04-17 01:42, schrieb Vladimir Oltean:
> From: Vladimir Oltean <vladimir.oltean@....com>
>
> This patch series contains logic for enabling the lossless mode on the
> RX rings of the ENETC, and the PAUSE thresholds on the internal FIFO
> memory.
>
> During testing it was found that, with the default FIFO configuration,
> a sender which isn't persuaded by our PAUSE frames and keeps sending
> will cause some MAC RX frame errors. To mitigate this, we need to
> ensure
> that the FIFO never runs completely full, so we need to fix up a
> setting
> that was supposed to be configured well out of reset. Unfortunately
> this
> requires the addition of a new mini-driver.
What happens if the mini driver is not enabled? Then the fixes aren't
applied and bad things happen (now with the addition of flow control),
right?
I'm asking because, if you have the arm64 defconfig its not enabled.
shouldn't it be something like:
diff --git a/drivers/net/ethernet/freescale/enetc/Kconfig
b/drivers/net/ethernet/freescale/enetc/Kconfig
index d88f60c2bb82..cdc0ff89388a 100644
--- a/drivers/net/ethernet/freescale/enetc/Kconfig
+++ b/drivers/net/ethernet/freescale/enetc/Kconfig
@@ -2,7 +2,7 @@
config FSL_ENETC
tristate "ENETC PF driver"
depends on PCI && PCI_MSI
- depends on FSL_ENETC_IERB || FSL_ENETC_IERB=n
+ select FSL_ENETC_IERB
select FSL_ENETC_MDIO
select PHYLINK
select PCS_LYNX
-michael
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