netdev - [PATCH net v2 0/2] Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

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Date:   Fri, 23 Apr 2021 02:31:47 +0900
From:   Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
To:     Rob Herring <robh+dt@...nel.org>, Andrew Lunn <andrew@...n.ch>,
        Heiner Kallweit <hkallweit1@...il.com>,
        "David S . Miller" <davem@...emloft.net>,
        Jakub Kicinski <kuba@...nel.org>
Cc:     netdev@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        Masami Hiramatsu <masami.hiramatsu@...aro.org>,
        Jassi Brar <jaswinder.singh@...aro.org>,
        Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Subject: [PATCH net v2 0/2] Change phy-mode to RGMII-ID to enable delay pins for RTL8211E

UniPhier PXs2, LD20, and PXs3 boards have RTL8211E ethernet phy, and the
phy have the RX/TX delays of RGMII interface using pull-ups on the RXDLY
and TXDLY pins.

After the commit bbc4d71d6354 ("net: phy: realtek: fix rtl8211e rx/tx
delay config"), the delays are working correctly, however, "rgmii" means
no delay and the phy doesn't work. So need to set the phy-mode to
"rgmii-id" to show that RX/TX delays are enabled.

Changes since v1:
- Fix the commit message

Kunihiko Hayashi (2):
  ARM: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins
    for RTL8211E
  arm64: dts: uniphier: Change phy-mode to RGMII-ID to enable delay pins
    for RTL8211E

 arch/arm/boot/dts/uniphier-pxs2.dtsi             | 2 +-
 arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 2 +-
 arch/arm64/boot/dts/socionext/uniphier-pxs3.dtsi | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

-- 
2.7.4