lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YIIGmpea6Mf0yzYS@lunn.ch>
Date:   Fri, 23 Apr 2021 01:28:26 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Vladimir Oltean <olteanv@...il.com>
Cc:     Prasanna Vengateshan <prasanna.vengateshan@...rochip.com>,
        netdev@...r.kernel.org, robh+dt@...nel.org,
        UNGLinuxDriver@...rochip.com, hkallweit1@...il.com,
        linux@...linux.org.uk, davem@...emloft.net, kuba@...nel.org,
        linux-kernel@...r.kernel.org, vivien.didelot@...il.com,
        f.fainelli@...il.com, devicetree@...r.kernel.org
Subject: Re: [PATCH v2 net-next 4/9] net: dsa: microchip: add DSA support for
 microchip lan937x

> > +
> > +		lan937x_pread8(dev, port, REG_PORT_XMII_CTRL_1, &data8);
> > +
> > +		/* clear MII selection & set it based on interface later */
> > +		data8 &= ~PORT_MII_SEL_M;
> > +
> > +		/* configure MAC based on p->interface */
> > +		switch (p->interface) {
> > +		case PHY_INTERFACE_MODE_MII:
> > +			lan937x_set_gbit(dev, false, &data8);
> > +			data8 |= PORT_MII_SEL;
> > +			break;
> > +		case PHY_INTERFACE_MODE_RMII:
> > +			lan937x_set_gbit(dev, false, &data8);
> > +			data8 |= PORT_RMII_SEL;
> > +			break;
> > +		default:
> > +			lan937x_set_gbit(dev, true, &data8);
> > +			data8 |= PORT_RGMII_SEL;
> > +
> > +			data8 &= ~PORT_RGMII_ID_IG_ENABLE;
> > +			data8 &= ~PORT_RGMII_ID_EG_ENABLE;
> > +
> > +			if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
> > +			    p->interface == PHY_INTERFACE_MODE_RGMII_RXID)
> > +				data8 |= PORT_RGMII_ID_IG_ENABLE;
> > +
> > +			if (p->interface == PHY_INTERFACE_MODE_RGMII_ID ||
> > +			    p->interface == PHY_INTERFACE_MODE_RGMII_TXID)
> > +				data8 |= PORT_RGMII_ID_EG_ENABLE;
> 
> This is interesting. If you have an RGMII port connected to an external
> PHY, how do you ensure that either the lan937x driver, or the PHY driver,
> but not both, enable RGMII delays?

What generally happens is the MAC adds no delays, and the PHY acts
upon the interface mode, inserting delays as requested.

There are a very small number of exceptions to this, for boards which
have a PHY which cannot do delays, and the MAC can. If i remember
correctly, this pretty much limited to one MAC vendor. In that case,
the MAC adds delays, if the interface mode requests it, and it always
passes PHY_INTERFACE_MODE_RGMII to the PHY so it does not add delays.

So what needs to be looked at here is what is passed to the phy
connect call? passing p->interface is definitely wrong if the MAC is
acting on it.

If even if the connect is correct, i would still prefer the MAC not do
the delays, let the PHY do it, like nearly every other setup.

	Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ