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Message-ID: <YIskbqKwhZA3n1Av@lunn.ch>
Date: Thu, 29 Apr 2021 23:26:06 +0200
From: Andrew Lunn <andrew@...n.ch>
To: DENG Qingfang <dqfext@...il.com>
Cc: "David S. Miller" <davem@...emloft.net>,
Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Jakub Kicinski <kuba@...nel.org>,
Landen Chao <Landen.Chao@...iatek.com>,
Matthias Brugger <matthias.bgg@...il.com>,
Russell King <linux@...linux.org.uk>,
Sean Wang <sean.wang@...iatek.com>,
Vivien Didelot <vivien.didelot@...il.com>,
Vladimir Oltean <olteanv@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Sergio Paracuellos <sergio.paracuellos@...il.com>,
linux-kernel@...r.kernel.org, linux-mediatek@...ts.infradead.org,
linux-staging@...ts.linux.dev, devicetree@...r.kernel.org,
netdev@...r.kernel.org, Weijie Gao <weijie.gao@...iatek.com>,
Chuanhong Guo <gch981213@...il.com>,
René van Dorst <opensource@...rst.com>,
Frank Wunderlich <frank-w@...lic-files.de>,
Thomas Gleixner <tglx@...utronix.de>,
Marc Zyngier <maz@...nel.org>
Subject: Re: [PATCH net-next 1/4] net: phy: add MediaTek PHY driver
On Thu, Apr 29, 2021 at 02:21:27PM +0800, DENG Qingfang wrote:
> Add support for MediaTek PHYs found in MT7530 and MT7531 switches.
> The initialization procedure is from the vendor driver, but due to lack
> of documentation, the function of some register values remains unknown.
>
> Signed-off-by: DENG Qingfang <dqfext@...il.com>
Reviewed-by: Andrew Lunn <andrew@...n.ch>
> +
> + /* Enable HW auto downshift */
> + phy_modify_paged(phydev, MTK_PHY_PAGE_EXTENDED, 0x14, 0, BIT(4));
As a follow up patch, you could add support for controlling this via a
PHY tunable.
Andrew
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