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Message-Id: <20210514113813.2093534-4-t.schramm@manjaro.org>
Date: Fri, 14 May 2021 13:38:13 +0200
From: Tobias Schramm <t.schramm@...jaro.org>
To: netdev@...r.kernel.org, devicetree@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
Heiko Stuebner <heiko@...ech.de>
Cc: "David S . Miller" <davem@...emloft.net>,
Jakub Kicinski <kuba@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Giuseppe Cavallaro <peppe.cavallaro@...com>,
David Wu <david.wu@...k-chips.com>,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Tobias Schramm <t.schramm@...jaro.org>
Subject: [PATCH 3/3] arm64: dts: rockchip: add gmac to rk3308 dts
The RK3308 SoC has a gmac with only the RMII interface exposed. This
commit adds it to the RK3308 dtsi.
Signed-off-by: Tobias Schramm <t.schramm@...jaro.org>
---
arch/arm64/boot/dts/rockchip/rk3308.dtsi | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
index 0c5fa9801e6f..b815ce73e5c6 100644
--- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi
@@ -637,6 +637,28 @@ nfc: nand-controller@...b0000 {
status = "disabled";
};
+ gmac: ethernet@...e0000 {
+ compatible = "rockchip,rk3308-gmac";
+ reg = <0x0 0xff4e0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&cru SCLK_MAC>, <&cru SCLK_MAC_RX_TX>,
+ <&cru SCLK_MAC_RX_TX>, <&cru SCLK_MAC_REF>,
+ <&cru SCLK_MAC>, <&cru ACLK_MAC>,
+ <&cru PCLK_MAC>, <&cru SCLK_MAC_RMII>;
+ clock-names = "stmmaceth", "mac_clk_rx",
+ "mac_clk_tx", "clk_mac_ref",
+ "clk_mac_refout", "aclk_mac",
+ "pclk_mac", "clk_mac_speed";
+ phy-mode = "rmii";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rmii_pins &mac_refclk_12ma>;
+ resets = <&cru SRST_MAC_A>;
+ reset-names = "stmmaceth";
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
cru: clock-controller@...00000 {
compatible = "rockchip,rk3308-cru";
reg = <0x0 0xff500000 0x0 0x1000>;
--
2.31.1
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