netdev - Re: [PATCH net-next 00/13] Add NXP SJA1110 support to the sja1105 DSA driver

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Message-ID: <20210526125110.legnhxrlq4r6hsym@skbuf>
Date:   Wed, 26 May 2021 15:51:10 +0300
From:   Vladimir Oltean <olteanv@...il.com>
To:     Andrew Lunn <andrew@...n.ch>
Cc:     Jakub Kicinski <kuba@...nel.org>,
        "David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
        Florian Fainelli <f.fainelli@...il.com>,
        Vivien Didelot <vivien.didelot@...il.com>,
        Vladimir Oltean <vladimir.oltean@....com>,
        Russell King <linux@...linux.org.uk>
Subject: Re: [PATCH net-next 00/13] Add NXP SJA1110 support to the sja1105
 DSA driver

On Tue, May 25, 2021 at 04:03:47AM +0200, Andrew Lunn wrote:
> > There are some integrated NXP PHYs (100base-T1 and 100base-TX). Their
> > initialization is handled by their own PHY drivers, the switch is only
> > concerned with enabling register accesses to them, by registering two
> > MDIO buses.
> > 
> > PHY interrupts might be possible, however I believe that the board I am
> > working on does not have them wired, which makes things a bit more
> > difficult to test.
> 
> In general, internal PHYs have an internal interrupt controller, often
> in the switch register space. There then might be one interrupt from
> the switch to the host. It could be this one interrupt is missing on
> your board. But this is also quite common with mv88e6xxx boards. So i
> added code to poll the interrupt bit, i think 10 times per
> second. Polling one bit 10 times a second is more efficient than
> having phylib poll each PHY every second when it needs to read a
> number of registers. And the latency is better.

That is a good suggestion and probably what I'll end up doing, but not
in this patch series since it is already on the heavy side, and getting
access to the interrupt status registers isn't easy-peasy.