netdev - RE: [net-next, v2, 1/7] ptp: add ptp virtual clock driver framework

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Date:   Mon, 31 May 2021 10:38:49 +0000
From:   "Y.b. Lu" <yangbo.lu@....com>
To:     Richard Cochran <richardcochran@...il.com>
CC:     "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "David S . Miller" <davem@...emloft.net>,
        Claudiu Manoil <claudiu.manoil@....com>,
        Jakub Kicinski <kuba@...nel.org>
Subject: RE: [net-next, v2, 1/7] ptp: add ptp virtual clock driver framework

> -----Original Message-----
> From: Richard Cochran <richardcochran@...il.com>
> Sent: 2021年5月24日 5:24
> To: Y.b. Lu <yangbo.lu@....com>
> Cc: netdev@...r.kernel.org; David S . Miller <davem@...emloft.net>; Claudiu
> Manoil <claudiu.manoil@....com>; Jakub Kicinski <kuba@...nel.org>
> Subject: Re: [net-next, v2, 1/7] ptp: add ptp virtual clock driver framework
> 
> On Fri, May 21, 2021 at 12:36:13PM +0800, Yangbo Lu wrote:
> > This patch is to add ptp virtual clock driver framework which just
> > exports essential APIs.
> >
> > A new member is added for ptp_clock_info structure. Device driver can
> > provide initial cyclecounter info for ptp virtual clock via this
> > member, before normally registering ptp clock.
> 
> Why not provide this in the PHC class layer, and make it work for every driver
> without alteration?

That's better. Will implement in v3.

> 
> > +/**
> > + * struct ptp_vclock_cc - ptp virtual clock cycle counter info
> > + *
> > + * @cc:               cyclecounter structure
> > + * @refresh_interval: time interval to refresh time counter, to avoid 64-bit
> > + *                    overflow during delta conversion. For example,
> with
> > + *                    cc.mult value 2^28,  there are 36 bits left of cycle
> > + *                    counter. With 1 ns counter resolution, the
> overflow time
> > + *                    is 2^36 ns which is 68.7 s. The refresh_interval
> may be
> > + *                    (60 * HZ) less than 68.7 s.
> > + * @mult_factor:      parameter for cc.mult adjustment calculation, see
> below
> > + * @div_factor:       parameter for cc.mult adjustment calculation, see
> below
> 
> Just use  mult = 2147483648 = 0x80000000 and div = 31.
> 
> Read the real PHC using .gettime() and then mask off the high 32 bits.
> 
> Arrange a kthread to read once every 4 (better 2) seconds to keep the time
> value correct.
> 
> See?

I see. I think you meant using below definitions for cyclecounter,

#define PTP_VCLOCK_CC_MULT             (1 << 31)
#define PTP_VCLOCK_CC_SHIFT            31
#define PTP_VCLOCK_CC_MULT_NUM         (1 << 9)
#define PTP_VCLOCK_CC_MULT_DEM         15625ULL
#define PTP_VCLOCK_CC_REFRESH_INTERVAL (HZ * 2)


> 
> Thanks,
> Richard