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Message-ID: <DB8PR04MB679514B98EB32EB8178614AEE63F9@DB8PR04MB6795.eurprd04.prod.outlook.com>
Date: Mon, 31 May 2021 09:28:10 +0000
From: Joakim Zhang <qiangqing.zhang@....com>
To: Thierry Reding <treding@...dia.com>
CC: "f.fainelli@...il.com" <f.fainelli@...il.com>,
"jonathanh@...dia.com" <jonathanh@...dia.com>,
"peppe.cavallaro@...com" <peppe.cavallaro@...com>,
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"davem@...emloft.net" <davem@...emloft.net>,
"kuba@...nel.org" <kuba@...nel.org>,
"mcoquelin.stm32@...il.com" <mcoquelin.stm32@...il.com>,
"andrew@...n.ch" <andrew@...n.ch>,
"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH V1 net-next] net: stmmac: should not modify RX descriptor
when STMMAC resume
Hi Thierry,
> -----Original Message-----
> From: Thierry Reding <treding@...dia.com>
> Sent: 2021年5月27日 22:27
> To: Joakim Zhang <qiangqing.zhang@....com>
> Cc: f.fainelli@...il.com; jonathanh@...dia.com; peppe.cavallaro@...com;
> alexandre.torgue@...s.st.com; joabreu@...opsys.com;
> davem@...emloft.net; kuba@...nel.org; mcoquelin.stm32@...il.com;
> andrew@...n.ch; netdev@...r.kernel.org; dl-linux-imx <linux-imx@....com>
> Subject: Re: [PATCH V1 net-next] net: stmmac: should not modify RX descriptor
> when STMMAC resume
>
> On Thu, May 27, 2021 at 04:49:11PM +0800, Joakim Zhang wrote:
> > When system resume back, STMMAC will clear RX descriptors:
> > stmmac_resume()
> > ->stmmac_clear_descriptors()
> > ->stmmac_clear_rx_descriptors()
> > ->stmmac_init_rx_desc()
> > ->dwmac4_set_rx_owner()
> > //p->des3 |= cpu_to_le32(RDES3_OWN |
> RDES3_BUFFER1_VALID_ADDR); It
> > only asserts OWN and BUF1V bits in desc3 field, doesn't clear desc0/1/2
> fields.
> >
> > Let's take a case into account, when system suspend, it is possible
> > that there are packets have not received yet, so the RX descriptors
> > are wrote back by DMA, e.g.
> > 008 [0x00000000c4310080]: 0x0 0x40 0x0 0x34010040
>
> This is something that completely baffles me. Why is DMA still writing back RX
> descriptors on system suspend? stmmac_suspend() should take care of
> completely quiescing the device so that DMA is no longer active. It sounds like
> for some reason that doesn't happen when you run into this problematic
> situation.
Thanks. I don't think so. stmmac_stop_all_dma() in stmmac_suspend() to stop RX DMA, RX descriptors
have been wrote back before stop DMA, and these descriptors have not been handled yet, so they stay there.
Explain more detailed, NAPI scheduled finished, DMA receive frames and write back RX descriptors, but RX interrupt
doesn't issue yet, system suspending, stop RX DMA. After system suspended, RX descriptors is the write back format.
> I see that some platform adaptations override the DMA ->stop_rx() callback
> (see dwmac-sun8i.c and dwxgmac2_dma.c), so perhaps some similar override
> is required on your platform to actually stop DMA?
I check the driver you mentioned, it seems they have SoC level registers to configure DMA. But i.MX8MP doesn't implement it.
Best Regards,
Joakim Zhang
> Thierry
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