lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Sat, 5 Jun 2021 16:37:03 +0200
From:   Andrew Lunn <andrew@...n.ch>
To:     Liang Xu <lxu@...linear.com>
Cc:     "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "davem@...emloft.net" <davem@...emloft.net>,
        "kuba@...nel.org" <kuba@...nel.org>,
        "vee.khee.wong@...ux.intel.com" <vee.khee.wong@...ux.intel.com>,
        "linux@...linux.org.uk" <linux@...linux.org.uk>,
        Hauke Mehrtens <hmehrtens@...linear.com>,
        Thomas Mohren <tmohren@...linear.com>
Subject: Re: [PATCH v2] net: phy: add Maxlinear GPY115/21x/24x driver

On Sat, Jun 05, 2021 at 03:46:18AM +0000, Liang Xu wrote:
> On 5/6/2021 4:39 am, Andrew Lunn wrote:
> > This email was sent from outside of MaxLinear.
> >
> >
> > On Fri, Jun 04, 2021 at 12:52:02PM +0000, Liang Xu wrote:
> >> On 4/6/2021 8:15 pm, Andrew Lunn wrote:
> >>> This email was sent from outside of MaxLinear.
> >>>
> >>>
> >>>> +config MXL_GPHY
> >>>> +     tristate "Maxlinear PHYs"
> >>>> +     help
> >>>> +       Support for the Maxlinear GPY115, GPY211, GPY212, GPY215,
> >>>> +       GPY241, GPY245 PHYs.
> >>> Do these PHYs have unique IDs in register 2 and 3? What is the format
> >>> of these IDs?
> >>>
> >>> The OUI is fixed. But often the rest is split into two. The higher
> >>> part indicates the product, and the lower part is the revision. We
> >>> then have a struct phy_driver for each product, and the mask is used
> >>> to match on all the revisions of the product.
> >>>
> >>>        Andrew
> >>>
> >> Register 2, Register 3 bit 10~15 - OUI
> >>
> >> Register 3 bit 4~9 - product number
> >>
> >> Register 3 bit 0~3 - revision number
> >>

> These PHYs have same ID and no difference OUI, product number, revision 
> number.

Are you saying GPY115, GPY211, GPY212, GPY215, GPY241, GPY245 all have
the same product number?

Normally, each PHY has its own product ID, and so we have:

/* Vitesse 82xx */
static struct phy_driver vsc82xx_driver[] = {
{
        .phy_id         = PHY_ID_VSC8234,
        .name           = "Vitesse VSC8234",
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = &vsc824x_config_init,
        .config_aneg    = &vsc82x4_config_aneg,
        .config_intr    = &vsc82xx_config_intr,
        .handle_interrupt = &vsc82xx_handle_interrupt,
}, {
        .phy_id         = PHY_ID_VSC8244,
        .name           = "Vitesse VSC8244",
        .phy_id_mask    = 0x000fffc0,
        /* PHY_GBIT_FEATURES */
        .config_init    = &vsc824x_config_init,
        .config_aneg    = &vsc82x4_config_aneg,
        .config_intr    = &vsc82xx_config_intr,
        .handle_interrupt = &vsc82xx_handle_interrupt,
}, {
        .phy_id         = PHY_ID_VSC8572,
        .name           = "Vitesse VSC8572",
        .phy_id_mask    = 0x000ffff0,
        /* PHY_GBIT_FEATURES */
        .config_init    = &vsc824x_config_init,
        .config_aneg    = &vsc82x4_config_aneg,
        .config_intr    = &vsc82xx_config_intr,
        .handle_interrupt = &vsc82xx_handle_interrupt,
}, {

one entry to describe one PHY.

    Andrew

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ